As the need for dimensional scaling continues to outpace the availability of higher resolution patterning solutions, the role of Design for Manufacturability (DfM) is shifting from providing incremental yield enhancement in 65nm and 45nm to becoming the fundamental technology enabler in 32nm and beyond. In parallel, the marketplace and the end customers are demanding high DfM quality at all design levels, from IP components to full chip. This course will cover the most popular manufacturability analysis techniques and their uses in DfM-enhanced design flows at different design phases. Model-based techniques such as critical area analysis, lithography hotspot detection, and CMP thickness prediction will be contrasted to rules-based techniques such as recommended design rules or enhanced routing rules. Differences between iterative DfM techniques such as process aware layout optimization and prescriptive DfM techniques such as regularized layouts and design aware manufacturing will be discussed. The advantages and challenges of introducing manufacturability knowledge early in the design flow will be compared to those of applying manufacturability considerations late. Finally, the most prominent opportunities for innovation in DfM for technology nodes beyond 65nm will be reviewed.