As semiconductor device scaling continues to challenge lithographic capabilities, complex corrections such as those offered by inverse lithography technology (ILT) have become essential. The MULTIGON record, developed to utilize Bezier curves for efficiently representing curved mask patterns through ILT, has been incorporated into the SEMI P49 extension of the OASIS format. Over time, as the standard format has been established, EDA vendors and mask manufacturing equipment makers have progressively implemented these specifications, enabling them to evaluate using various real-world data. Our earlier study has not only addressed the handling of Bezier curves in Mask Data Preparation (MDP) but have also raised and discussed fundamental issues regarding the necessary geometric operations for MDP, exploring potential problems that might arise. This paper evaluates their practical application in mask layouts, specifically focusing on the challenges associated with implicit Bezier curve representations and the sizing operation to implicit Bezier curves, which is very essential geometric operations for MDP.
The integration of curvy mask patterns represented by Inverse Lithography Technology (ILT), into Mask Data Preparation (MDP) has been a practical reality due to the emergence of multi-beam mask writers. This has led to a shift in the industry’s focus from approximating curvy patterns with piecewise linear polygons to directly handling the curves themselves to satisfy the requirements of higher fidelity and data volume. To address this challenge, a working group has been organized with the mask industry to extend OASIS format so that curves can be represented directly. This will lead a growing need for direct handling of curves in various stages of MDP. The geometry processing algorithms used in MDP are designed and optimized for Manhattan shape and piecewise linear polygons so that direct handling of curves in such algorithms are challenging and still in an early stage. This study aims to provide insight of the impact of the introduction of curve patterns into MDP through a comparison with the traditional piecewise linear polygon representation.
To achieve the ultimate resolution and process control from an optical (193i 1.35NA) scanner system, it is desirable to be able to exploit both source and mask degrees of freedom to create the imaging conditions for any given set of patterns that comprise a photomask. For the source it has been possible to create an illumination system that allows for almost no restrictions in the location and intensity of source points in the illumination plane [1]. For the mask, it has been harder to approach the ideal continuous phase and transmission mask that theoretically would have the best imaging performance. Mask blanks and processing requirements have limited us to binary (1 and 0 amplitude, or 1 and -0.25 amplitude (6% attenuated PSM)) or Alternating PSM (1, 0 and -1 amplitude) solutions. Furthermore, mask writing (and OPC algorithms) have limited us to Manhattan layouts for full chip logic solutions. Recent developments in the areas of mask design and newly developed Multi-Beam Mask Writers (MBMW) have removed the mask limitation to Manhattan geometries [2]. In this paper we consider some of the manufacturing challenges for these curvilinear masks.
Demand for mask process correction (MPC) is growing for leading-edge process nodes. MPC was originally intended to
correct CD linearity for narrow assist features difficult to resolve on a photomask without any correction, but it has been
extended to main features as process nodes have been shrinking.
As past papers have observed, MPC shows improvements in photomask fidelity. Using advanced shape and dose
corrections could give more improvements, especially at line-ends and corners. However, there is a dilemma on using
such advanced corrections on full mask level because it increases data volume and run time. In addition, write time on
variable shaped beam (VSB) writers also increases as the number of shots increases.
Optical proximity correction (OPC) care-area defines circuit design locations that require high mask fidelity under mask
writing process variations such as energy fluctuation. It is useful for MPC to switch its correction strategy and permit the
use of advanced mask correction techniques in those local care-areas where they provide maximum wafer benefits. The
use of mask correction techniques tailored to localized post-OPC design can result in similar desired level of data
volume, run time, and write time. ASML Brion and NCS have jointly developed a method to feedforward the care-area
information from Tachyon LMC to NDE-MPC to provide real benefit for improving both mask writing and wafer
printing quality.
This paper explains the detail of OPC care-area feedforwarding to MPC between ASML Brion and NCS, and shows the
results. In addition, improvements on mask and wafer simulations are also shown. The results indicate that the worst
process variation (PV) bands are reduced up to 37% for a 10nm tech node metal case.
This industry faces new challenges every day. It gets tougher as process nodes shrink and the data complexity and
volume increase.
We are a mask data preparation (MDP) software provider, and have been providing MDP systems to mask shops since
1990. As the industry has, MDP software providers also have been facing new challenges over time, and the challenges
get tougher as process nodes shrink and the data complexity and volume increase. We discuss such MDP challenges and
solutions in this paper from a MDP software provider’s perspective.
The data volume continuously increases, and it is caused by shrinking the process node. In addition, resolution
enhancement techniques (RET) such as optical proximity correction (OPC) and inverse lithography technique (ILT)
induce data complexity, and it contributes considerably to the increase in data volume. The growth of data volume and
complexity brings challenges to MDP system, such as the computing speed, shot count, and mask process correction
(MPC).
New tools (especially mask writers) also bring new challenges. Variable-shaped E-beam (VSB) mask writers demand
fracturing less slivers and lower figure counts for CD accuracy and write time requirements respectively. Now multibeam
mask writers are under development and will definitely bring new challenges.
To enable Inverse Lithography Technology (ILT) for production as one of the leading candidates for low-k1 lithography
at 32nm and below, one major task to overcome is mask manufacturability including mask data fracturing, MRC
constraints, writing time, and inspection. In prior publications[1,2], it has been shown that the Inverse Synthesizer (ISTM)
produces ILT full chip mask of contact layer with comparable mask write time with conventional OPC while
maintaining the significant litho gains of ILT mask.
To fully integrate ILT masks into production for all layers including line and space layers such as poly layer, a number of
areas were investigated to further reduce ILT mask complexity and total e-beam shot count. These areas include flexible
controls of SRAF placements with respect to local feature sizes, improved Manhattan algorithm, topology based variable
Manhattan segmentation, jog alignment and mask data fracture optimization. The impact of these approaches on e-beam
shot count and lithography performance of ILT masks is presented in the paper.
KEYWORDS: Nondestructive evaluation, Distributed computing, Data storage servers, Databases, Data storage, Data communications, Control systems, Photomask technology, Current controlled current source, Data conversion
Data volume is getting larger every day in Mask Data Preparation (MDP). In the meantime, faster data handling is
always required. MDP flow typically introduces Distributed Processing (DP) system to realize the demand because using
hundreds of CPU is a reasonable solution. However, even if the number of CPU were increased, the throughput might be
saturated because hard disk I/O and network speeds could be bottlenecks. So, MDP needs to invest a lot of money to not
only hundreds of CPU but also storage and a network device which make the throughput faster.
NCS would like to introduce new distributed processing system which is called "NDE". NDE could be a distributed disk
system which makes the throughput faster without investing a lot of money because it is designed to use multiple
conventional hard drives appropriately over network. NCS studies I/O performance with OASIS® data format on NDE
which contributes to realize the high throughput in this paper.
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