Dr. Brian A. Smith Profile

Dr. Brian A. Smith

Field Applications Manager

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Publications (8)

Proceedings Article | 16 April 2011 Paper

Improving material-specific dispense processes for low-defect coatings

Nick Brakensiek, Jennifer Braggin, John Berron, Raul Ramirez, Karl Anderson, Brian Smith

Proceedings Volume 7972, 79722Z (2011) https://doi.org/10.1117/12.879481

KEYWORDS: Semiconducting wafers, Manufacturing, Materials processing, Lithography, Industrial chemicals, Photoresist materials, Photoresist developing, Optical lithography, Bottom antireflective coatings, Wafer testing

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Proceedings Article | 2 April 2010 Paper

Minimizing the outgassing of spin-coated organic materials to reduce defects

Brandy Carr, April Evers, Marc Weimer, Brian Smith, Jeff Leith

Proceedings Volume 7638, 763823 (2010) https://doi.org/10.1117/12.846102

KEYWORDS: Semiconducting wafers, Particles, Polymers, Quartz, Crystals, Wafer testing, Defect detection, Systems modeling, Organic materials, Scanning electron microscopy

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Proceedings Article | 2 April 2010 Paper

High-resolution defect metrology for silicon BARC analysis

Brian Smith, Steve McGarvey, Zhimin Zhu, Yubao Wang, Dan Sullivan

Proceedings Volume 7638, 763824 (2010) https://doi.org/10.1117/12.846690

KEYWORDS: Coating, Semiconducting wafers, Silicon, System on a chip, Particles, Reflectivity, Air contamination, Metrology, Etching, Surface roughness

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Measuring coating defects on two or more blanket film layers is difficult and can be misleading due to reflectivity changes from the bottom layer, and surface roughness not present when the substrate is only polished silicon. To improve signal-to-noise ratio and establish a lower limit for particle size detection, polystyrene latex (PSL) spheres are deposited on the film stack. Particles as small as 54 nm were detectable on a stack 330-nm thick using a Hitachi LS Series Surface Scanning Inspection System (SSIS) and RS5500 Defect Review Scanning Electron Microscope (DRSEM). These systems have advanced capabilities enabling automated detection, classification, and characterization of defects down to 30 nm or smaller on some substrates and films. Haze wafer maps are related to surface roughness and reflectivity and show unusual asymmetries possibly caused by dispense problems or exhaust flow patterns during baking. These maps can be helpful to find problems in the coating system, even if film thickness is on target. Preliminary testing results are presented for a typical trilayer pattern stack for high-resolution 193-nm patterning consisting of a silicon spinon hardmask (HM) layer on top of a spin-on carbon (SOC) layer. The majority of the defects were caused by bubble formation within the HM that was modulated by process conditions used for these tests. A higher spin speed for the HM coating produced lower defects, most likely due to a thinner film with less trapped solvent during baking, but this effect will require more study, as it could also be due to a faster evaporation rate caused by higher airflow. Pre-wet, spin time, and bake temperature did not produce significant effects within these tests, but showed trends requiring further study. These advanced spin-on HM materials can be applied as thin as 15 to 20 nm due to their high etch selectivity. With the use of such high-resolution defect metrology, very subtle chemical interactions and process effects can be examined to find the ideal process conditions for both the SOC and HM layers.

Proceedings Article | 31 March 2010 Paper

Improving material-specific dispense processes for low-defect coatings

Brian Smith, Raul Ramirez, Jennifer Braggin, Aiwen Wu, Karl Anderson, John Berron, Nick Brakensiek, Carlton Washburn

Proceedings Volume 7639, 763929 (2010) https://doi.org/10.1117/12.846642

KEYWORDS: Semiconducting wafers, Particles, Liquids, Manufacturing, Materials processing, Data modeling, Lithography, Intelligence systems, Product engineering, Process engineering

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Proceedings Article | 1 April 2009 Paper

Effects of carbon/hardmask interactions on hardmask performance

Charles Neef, Brian Smith, Chris James, Zhimin Zhu, Michael Weigand

Proceedings Volume 7273, 727311 (2009) https://doi.org/10.1117/12.814257

KEYWORDS: Carbon, Silicon, Silicon carbide, Etching, Photoresist materials, Lithography, Silicon films, Semiconducting wafers, Chemistry, Epoxies

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Proceedings Article | 16 March 2009 Paper

Thin hardmask patterning stacks for the 22-nm node

Zhimin Zhu, Emil Piscani, Yubao Wang, Jan Macie, Charles Neef, Brian Smith

Proceedings Volume 7274, 72742K (2009) https://doi.org/10.1117/12.813816

KEYWORDS: Silicon, Optical lithography, Ultraviolet radiation, Silicon carbide, Lithography, Etching, Carbon, Reflectivity, Photoresist materials, Diffraction

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Proceedings Article | 1 April 2008 Paper

Reflection control in hyper-NA immersion lithography

Zhimin Zhu, Emil Piscani, Kevin Edwards, Brian Smith

Proceedings Volume 6924, 69244A (2008) https://doi.org/10.1117/12.772899

KEYWORDS: Reflectivity, Ultraviolet radiation, Reflection, Phase shifts, Critical dimension metrology, Fused deposition modeling, Lithography, Diffraction, UV optics, Diffusion

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Proceedings Article | 27 March 2008 Paper

Wet trimming process for critical dimension reduction

Sam Sun, Brian Smith, Anwei Qin

Proceedings Volume 6923, 692336 (2008) https://doi.org/10.1117/12.772925

KEYWORDS: Etching, Photoresist materials, Plasma, Lithography, Photoresist developing, Photoresist processing, Plasma etching, Oxides, Scanning electron microscopy, Line edge roughness

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Showing 5 of 8 publications

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