Microelectronics industry leaders routinely name the cost and cycle time of mask technology and mask supply as top
critical issues. A survey was created with support from SEMATECH and administered by SEMI North America to
gather information about the mask industry as an objective assessment of its overall condition. This year's survey
data were presented in detail at BACUS and the detailed trend analysis presented at EMLC. The survey is designed
with the input of semiconductor company mask technologists, merchant mask suppliers, and industry equipment
makers. This year's assessment is the sixth in the current series of annual reports. With continued industry support,
the report can be used as a baseline to gain perspective on the technical and business status of the mask and
microelectronics industries. The report will continue to serve as a valuable reference to identify the strengths and
opportunities of the mask industry. The results will be used to guide future investments on critical path issues. This
year's survey is basically the same as the 2005 and 2006 surveys. Questions are grouped into eight categories:
General Business Profile Information, Data Processing, Yields and Yield Loss, Mechanisms, Delivery Times,
Returns and Services, Operating Cost Factors, and Equipment Utilization. Within each category is a multitude of
questions that creates a detailed profile of both the business and technical status of the critical mask industry. Note:
the questions covering operating cost factors and equipment utilization were added to the survey only in 2005;
therefore, meaningful trend analysis is not available.
Microelectronics industry leaders routinely name the cost and cycle time of mask technology and mask supply as top
critical issues. A survey was created with support from SEMATECH and administered by SEMI North America to
gather information about the mask industry as an objective assessment of its overall condition. The survey is
designed with the input of semiconductor company mask technologists, merchant mask suppliers, and industry
equipment makers. This year's assessment is the sixth in the current series of annual reports. With ongoing industry
support, the report can be used as a baseline to gain perspective on the technical and business status of the mask and
microelectronics industries. The report will continue to serve as a valuable reference to identify the strengths and
opportunities of the mask industry. The results will be used to guide future investments pertaining to critical path
issues. This year's survey is basically the same as the 2005 and 2006 surveys. Questions are grouped into categories:
General Business Profile Information, Data Processing, Yields and Yield Loss Mechanisms, Delivery Times,
Returns and Services, Operating Cost Factors, and Equipment Utilization. Within each category is a multitude of
questions that create a detailed profile of both the business and technical status of the critical mask industry.
Microelectronics industry leaders routinely name the cost and cycle time of mask technology and mask supply as top
critical issues. A survey was created with support from SEMATECH and administered by SEMI North America to
gather information about the mask industry as an objective assessment of its overall condition. This year's survey
data was presented at BACUS and a detailed trend analysis is presented here. The annual survey is designed with the
input of semiconductor company mask technologists, merchant mask suppliers and industry equipment makers. This
year's assessment is the fifth in the current series of annual reports. With continued industry support the report can
be used as a baseline to gain perspective on the technical and business status of the mask and microelectronics
industries. The report will continue to serve as a valuable reference to identify trends in the mask industry. The
results will be used to guide future investments on critical path issues. This year's survey is basically the same as the
2005 survey. Questions are grouped into categories: General Business Profile Information, Data Processing, Yields
and Yield Loss, Mechanisms, Delivery Times, Returns and Services, Operating Cost Factors, and Equipment
Utilization. Within each category is a multitude of questions that create a detailed profile of both the business and
technical status of the critical mask industry. Note: the questions covering operating cost factors and equipment
utilization were only added to the survey in 2005; therefore meaningful trend analysis is not yet available.
Microelectronics industry leaders routinely name the cost and cycle time of mask technology and mask supply as top critical issues. A survey was created with support from SEMATECH and administered by SEMI North America to gather information about the mask industry as an objective assessment of its overall condition. The survey is designed with the input of semiconductor company mask technologists, merchant mask suppliers, and industry equipment makers. This year's assessment is the fifth in the current series of annual reports. With continued industry support, the report can be used as a baseline to gain perspective on the technical and business status of the mask and microelectronics industries. The report will continue to serve as a valuable reference to identify the strengths and opportunities of the mask industry. The results will be used to guide future investments pertaining to critical path issues. This year's survey is basically the same as the 2005 survey. Questions are grouped into categories: General Business Profile Information, Data Processing, Yields and Yield Loss Mechanisms, Delivery Times, Returns and Services, Operating Cost Factors, and Equipment Utilization. Within each category is a multitude of questions that create a detailed profile of both the business and technical status of the critical mask industry.
Microelectronics industry leaders routinely name mask cost and cycle time as top issues of concern. In 2002, a
survey was created with support from SEMATECH and administered by SEMI North America to gather information
about the mask industry as an objective assessment of its overall condition. The survey is designed with the input of
mask technologists from semiconductor manufacturers, merchant mask suppliers, and makers of mask equipment.
The 2005 survey was the fourth in the current series of annual surveys. The survey data can be used as a baseline for
the mask industry and the microelectronics industry to gain a perspective on the technical and business status of the
mask industry. The results may be used to guide future investments on critical path issues. Questions are grouped
into categories: general business profile information, data processing, yields and yield loss mechanisms, delivery
times, returns and services, operating cost factors, and equipment utilization. Because the questions covering
operating cost factors and equipment utilization were just added to the survey, no trend analysis is possible. Within
each category are many questions that together create a detailed profile of both the business and technical status of
the mask industry. The assessment participation has changed from year to year. The 2005 survey, for example,
includes inputs from eight major global merchant and captive mask manufacturers whose revenue represents
approximately 85% of the global mask market.
Microelectronics industry leaders routinely name mask cost and cycle time as top issues of concern. A survey was created with support from International SEMATECH (ISMT) and administered by SEMI North America to gather information about the mask industry as an objective assessment of its overall condition. The survey is designed with the input of mask technologists from semiconductor manufacturers, merchant mask suppliers, and makers of equipment for mask fabrication. This year's assessment is the fourth in the current series of annual reports and is intended to be used as a baseline for the mask industry and the microelectronics industry to gain a perspective on the technical and business status of the mask industry. This report will continue to serve as a valuable reference to identify the strengths and opportunities of the mask industry. The results may be used to guide future investments on critical path issues. This year's survey contains all of the 2004 survey questions to provide an ongoing database. Additional questions were added to the survey covering operating cost factors and equipment utilization. Questions are grouped into categories: general business profile information, data processing, yields and yield loss mechanisms, delivery times, returns and services, operating cost factors and equipment utilization. Within each category are a many questions that create a detailed profile of both the business and technical status of the mask industry. This assessment includes inputs from eight major global merchant and captive mask manufacturers whose revenue represents approximately 85% of the global mask market. This participation rate is reduced by one captive from 2004. Note: Toppan, DuPont Photomasks Inc and AMTC (new) were consolidated into one input therefore the 2004 and 2005 surveys are basically equivalent.
Chrome-based absorbers have been the mainstay of the photomask industry for three decades. While chrome is attractive because of its durability and opacity, it conversely poses challenges for etch and repair. Due to large capital investments, any new absorber must be designed to work with existing scanners, mask writers, and mask inspection tools. Furthermore changing absorber materials may not improve defect control in mask blank fabrication, which is a paramount concern in blank fabrication. Consequently, blank manufacturers are reluctant to change from chrome. In terms of return on investment (ROI), the only driver to switch technologies is achieving higher mask and wafer yields. This is a reasonable assumption as both etch and repair tool suppliers believe a non-chrome material like tantalum (Ta) compounds would significantly improve their capabilities with known technologies. A high level estimate shows that with even aggressive improvement assumptions, a 100% conversion from chrome does not save money. Based on the current International SEMATECH (ISMT) cost of ownership (COO) model and improved yields for critical dimension (CD) and defects, a case can be made for converting at and below 100 nm ground rules. An industry wide conversion from chrome to a non-chrome absorber is estimated to cost $100M. By contrast, blank suppliers are reportedly spending "multiple" millions of dollars to improve chrome per year. A widespread concern is whether binary optical masks have enough life left to provide sufficient ROI. Optical lithography will continue to be of use in the foreseeable future. Even as leading-edge production moves to new technology, the main manufacturing volumes will continue to create significant demand for masks for 100 nm to 45 nm for many years. With the industry currently pushing extreme ultraviolet lithography (EUVL), the best situation would be for EUVL and optical lithography to choose the same absorber material. This creates a winning situation for the industry independent of EUVL implementation timing. Today Ta-based films are a reasonable choice.
Microelectronics industry leaders routinely name mask cost and cycle time as top issues of concern. A survey was created with support from International SEMATECH (ISMT) and administered by SEMI North America to gather information about the mask industry as an objective assessment of its overall condition. The survey is designed with the input of mask technologists from semiconductor manufacturers, merchant mask suppliers, and makers of equipment for mask fabrication. This year's assessment is the third in the current series of annual reports and is intended to be used as a baseline for the mask industry and the microelectronics industry to gain a perspective on the technical and business status of the mask industry. This report will continue to serve as a valuable reference to identify the strengths and opportunities of the mask industry. The results may be used to guide future investments on critical path issues. This year's survey builds upon the 2003 survey to provide an ongoing database using the same questions as a baseline with only a few minor changes or additions. Questions are grouped into categories: general business profile information, data processing, yields and yield loss mechanisms, delivery times, returns and services. Within each category are a many questions that create a detailed profile of both the business and technical status of the mask industry. This assessment includes inputs from ten major global merchant and captive mask manufacturers whose revenue represents approximately 85% of the global mask market.
The high volume inspection equipment currently available to support development of EUV blanks is non-actinic. The same is anticipated for patterned EUV mask inspection. Once potential defects are identified and located by such non-actinic inspection techniques, it is essential to have instrumentation to perform detailed characterization, and if repairs are performed, re-evaluation. The ultimate metric for the acceptance or rejection of a mask due to a defect, is the wafer level impact. Thus, measuring the aerial image for the site under question is required. An EUV Aerial Image Microscope (“AIM”) similar to the current AIM tools for 248nm and 193nm exposure wavelength is the natural solution for this task. Due to the complicated manufacturing process of EUV blanks, AIM measurements might also be beneficial to accurately assessing the severity of a blank defect. This is an additional application for an EUV AIM as compared to today’s use.
In recognition of the critical role of an EUV AIM for the successful implementation of EUV blank and mask supply, International SEMATECH initiated this design study with the purpose to define the technical requirements for accurately simulating EUV scanner performance, demonstrating the feasibility to meet these requirements and to explore various technical approaches to building an EUV AIM tool.
Extreme ultraviolet (EUV) multilayer defects (phase defects) are a defect type unique to extreme ultraviolet lithography (EUVL) masks. A manufacturable inspection capability for these defects is key to the success of EUV lithography. Simulations of EUV scattering from multilayer defects suggest that defect printability is related to the phase error induced by the defect, which is in turn strongly coupled to the size of a multilayer surface protrusion or intrusion. We can adopt a strategy of measuring the multilayer surface to detect phase defects.
During the past year a working group composed of members of Intel Corporation, Lawrence Berkeley and Lawrence Livermore National Laboratories, and International Sematech searched for a commercial tool for EUVL mask substrate and blank inspection. This working group established the tool requirements, methodologies for tool evaluation, collected data and recommended a supplier for further development with International Sematech. We collected data from several vendors and found that a multibeam confocal inspection (MCI) system had a capability significantly better than the tools used today.
We will present our strategy, requirements, methodologies and results. We will discuss in detail our unique programmed substrate and multilayer defect masks used to support the tool selection, including their actinic characterization. We will present data that quantifies the inspection capability of the MCI system.
In 1992 the SIA published the first roadmap for semiconductors. Since then formal updates have been published in 1994, 1997, 1999 and now 2001. The 2001 ITRS update will not be published until Dec. 2001 so the tables in this document may change in the final release. The complete 2001 update can be found at: http:/'/pubiic.i.trsnet/ Sinc e the earliest days of the microelectronics industry, optical lithography has been the mainstream technology for volume manufacturing, and it is expected to continue as such through the 65 nm node, through the application of resolution enhancement techniqies such as off-axis illumination (OAI), phase shifting masks (PSM) and optical proximity corrections (OPC). In addition to resolution enhancement techniques, wavelength reductions (248 nnr 193 nm-) 157 nm) and lenses with increasing numerical apertures and decreasing aberrations will be required to extend the life of optical lithography. The requirements of the 45 nm node and beyond are viewed as beyond the capabilities of optical lithography. Extension of the Roadmap will require the development of next- generation lithography (NGL) technologies, such extreme ultraviolet lithography (EUV) and electron projection lithography (EPL). Because next generation lithographies will require the development of substantially new infrastructure, the costs of these technolo gies will put great pressure on manufacturing costs. Mask-making capability and cost escalation have become the major limiter to lithography progress. The roadmap acceleration has been very troublesome to the mask industry. CD control is falling behind the requirements of the chipmakers Where it might be said that the mask makers have been hit by the "perfect storm". First the two year cycle has reduced the available time for development, Secondly the gate widths post etch for MPU's have reduced even Ihster, And finally the mask industry has been asked to absorb the entire impact of the increased MEF associated with Low Kl Lithography. Mask equipment and process capabilities are in manufacturing for complex OPC and PSM.. Mask processes for Post 193nm technologies are in research and development.
In this paper we will discuss the results obtained from five alternating aperture phase-shifting masks (altPSM), each with an identical layout but manufactured using a different technique. We will show the results obtained for mask CD performance measured on a SEM for a number of dimensions and duty cycles. We will show how the results obtained from conventional mask metrology compare with results from advanced analysis including mask topography information obtained using an automated atomic force microscope (AFM). Comparison will be made showing how the metrology structures on the mask compare to the actual structures in the patterning area. A comparison of the results achieved from each mask manufacturing technique will also be made.
Last year's first reduction ration workshop ended in a consensus to maintain mask magnification at 4X, presentations at the meeting centered on when the mask industry could be ready for the lOOnm and 70nm lithography nodes as defined in the ITRS. The majority of the participants indicated by survey that they believed an increase in magnification from 4X to 5X or 6X is needed to pull the projected availability of photomasks in two years (2002) at the lOOnm node. Equivalently keeping the scan/field height a 22mm allows for 5X reticles to remain on 6" substrates. Some support was shown for 7" reticles but very little for 9" reticles based on the perceived difficulty to manufacture and high costs.
Photomask technology remains one of the key enablers for the advancement of the semiconductor industry. Optical lithography will continue to be the mainstream technology for 0.25 micrometers and will likely extend below 0.2 micrometers . Continuous improvements in all aspects of fabrication will be required to support the ever decreasing error budgets as critical images continue to shrink. Additionally, stepper manufacturers will be migrating to large print fields via the use of advanced techniques like step and scan. The size of these print fields becomes limited, not by the size of the lens, but by the size of the photomask. For the photomask industry to cost-effectively implement the next reticle size, standardization will be required. Sufficient volume of production and higher process will be necessary to recover the high implementation costs.
As design rules shrink to meet the needs of advanced chips, the allocation of allowable errors between sources gets ever more critical. This paper will examine the error sources and budgets for current technologies and project the requirements for future 64 and 256 megabit generations.
The emphasis will be on overlay and critical dimension as a function of design rule generation for the photomask, the photolithographic process and the etching process.
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