In this paper the use of the EPE metric directly in the process optimization method for a DRAM use case has been researched. We show that EPE-aware optimization, using scanner dose and overlay control sub-recipes, is outperforming conventional optimization in terms of EPE Dies in Spec. Hence, it can be expected that also device yield can be improved by EPE-aware control.
During metrology overlay recipe setup typically a wide range of different target designs are present to select from. The main goal of recipe setup is to select the most accurate target type-recipe combination at ADI (after develop inspection) without additional external information that can be used for production on a large set of wafers. We will introduce a method based on blind source separation to disentangle the contributions of target asymmetry and the overlay of the targets. Based on this separation, the most accurate target-recipe combination can be selected. On top of selecting the most accurate target-recipe combination, it is important to stabilize the difference between the overlay on device and the overlay as measured on the target. In order to increase that stability we will introduce advanced algorithms in the ADI measurements that use measured asymmetry parameters to correct for inline target asymmetry variation. We will show a metrology to device matching improvement of up to 40% on product wafers.
State of the art after-develop (ADI) overlay is measured with multi-wavelength micro diffraction-based overlay techniques. A micro diffraction-based overlay target consists of two pairs of gratings, with the same pitch in the top and bottom layer. The gratings in the top layer have a bias offset with respect to the bottom layer in the positive or negative direction. When illuminated, +1st and -1st order light is diffracted. The asymmetry in the intensity of these signals contains the overlay information. In this paper, ADI overlay is measured with a new dark-field target design for ADI overlay. Like a micro diffraction-based overlay target, it consists of pairs of gratings in the top and bottom layer. Instead of a bias offset between top and bottom gratings, different pitches are used resulting in a continuous-bias throughout the grating pair. When illuminated the diffracted light contains moiré fringes, in which the overlay is stored in the phases. This technique has improved accuracy and robustness by design, because it is immune to symmetrical process changes like stack height variations and grating imbalance. Additionally, it shows more stable behavior through wavelength, both in signal strength and overlay. These characteristics make it possible, with a single wavelength, to achieve similar or better performance than micro diffraction-based overlay using a multi-wavelength solution, resulting in higher throughput. This is demonstrated on Samsung’s latest memory node where on average an 21% reduction is achieved in the 3sigma of the mis reading correction with a single-wavelength phase-based overlay measurements, compared to multi-wavelength micro diffraction-based overlay measurements.
Improvements on on-cell overlay is necessary to suppress misalign induced defects. Precise and accurate on-cell overlay measurements are strongly demanded, however, we are facing limitations on conventional CD-SEM based on-cell overlay measurements, such as unexpected overlay bias. To mitigate drawbacks of top view based on-cell overlay measurements, we present voltage contrast based overlay measurements (VCBO) which utilize specially designed cell patterns with combinations of programmed misalignments on scribe lanes, measured by defect inspection equipment, eP5 [1]. We successfully demonstrate the first defect based overlay measurement on DRAM device and a potential of 27% in-die overlay gain is shown. Also, we display overlay process margin at about ~1000 points on wafer. As a definite standard of on-product overlay measurement, this technology will be used for advanced misreading correction (MRC). We believe that the technique would be widely used and become necessary in near future.
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