Mr. Patrick Wong Profile

Patrick Wong

Researcher at imec

SPIE Involvement:

Author

Area of Expertise:

Lithography , Double Patterning , Process Development

Publications (24)

Proceedings Article | 28 April 2023 Poster + Paper

Poster + Paper

BEOL N2: M2 through SAxP process from MP21 to MP26: 193i SAQP vs EUV SADP

Yannick Hermans, Chen Wu, Nunzio Buccheri, Filip Schleicher, Janko Versluijs, Daniel Montero, Bappaditya Dey, Patrick Wong, Paulina Rincon-Delgadillo, Seongho Park, Zsolt Tokei, Philippe Leray, Sandip Halder

Proceedings Volume 12494, 1249414 (2023) https://doi.org/10.1117/12.2657917

KEYWORDS: Optical lithography, Semiconducting wafers, Lithography, Back end of line, Resistance, Extreme ultraviolet lithography, Etching, Critical dimension metrology

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Proceedings Article | 26 May 2022 Paper

Paper

Orthogonal array pillar process development for high density 4F2 memory cells at 40nm pitch and beyond

Murat Pak, Wesley Zanders, Patrick Wong, Sandip Halder, Romuald Blanc, Laurent Souriau, Jeonghoon Lee, Gouri Sankar Kar

Proceedings Volume 12051, 120510J (2022) https://doi.org/10.1117/12.2618761

KEYWORDS: Semiconducting wafers, Photoresist materials, Array processing, Extreme ultraviolet lithography, Optical lithography, Finite element methods, Etching, Electroluminescence, Critical dimension metrology, Scanning electron microscopy

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Proceedings Article | 19 October 2021 Presentation + Paper

Presentation + Paper

Towards high NA patterning readiness: materials, processes and etch transfer for P24 Line Space

A. Thiam, J. G. Santaclara, J-H. Franke, F. Schleicher, R. Blanc, P. Bezard, A. Moussa, P. Wong, E. Hendrickx, M. Maslow

Proceedings Volume 11854, 118540A (2021) https://doi.org/10.1117/12.2601839

KEYWORDS: Etching, Photoresist materials, Semiconducting wafers, Optical lithography, Scanning electron microscopy, Photoresist processing, Lithography, Atomic force microscopy, Photoresist developing, Oxides

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SPIE Journal Paper | 17 August 2018

Assessment of pattern variability and defectivity by large-scale SEM metrology with >100 million measurements

Fuming Wang, Stefan Hunsche, Hung Yu Tien, Peng Tang, Junwei Wei, Yongjun Wang, Wei Fang, Patrick Wong

JM3, Vol. 17, Issue 04, 041007, (August 2018) https://doi.org/10.1117/12.10.1117/1.JMM.17.4.041007

KEYWORDS: Semiconducting wafers, Scanning electron microscopy, Stochastic processes, Critical dimension metrology, Metrology, Photomasks, Inspection, Optical proximity correction, Electron beam lithography, Etching

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Proceedings Article | 13 March 2018 Paper

Paper

Assessment of local variability by high-throughput e-beam metrology for prediction of patterning defect probabilities

Fuming Wang , Stefan Hunsche, Roy Anunciado, Antonio Corradi , Hung Yu Tien, Peng Tang, Junwei Wei, Yongjun Wang, Wei Fang, Patrick Wong, Anton van Oosten, Koen van Ingen Schenau, Bram Slachter

Proceedings Volume 10585, 1058525 (2018) https://doi.org/10.1117/12.2297603

KEYWORDS: Semiconducting wafers, Stochastic processes, Scanning electron microscopy, Metrology, Electron beam lithography, Photomasks, Inspection, Critical dimension metrology, Optical proximity correction, Deep ultraviolet

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Proceedings Article | 28 March 2017 Paper

Paper

Efficient hybrid metrology for focus, CD, and overlay

W. T. Tel, B. Segers, R. Anunciado, Y. Zhang, P. Wong, T. Hasan, C. Prentice

Proceedings Volume 10145, 101452E (2017) https://doi.org/10.1117/12.2257965

KEYWORDS: Metrology, Overlay metrology, Critical dimension metrology, Optical lithography, Scanners, Semiconductors, Semiconducting wafers, Etching, Sensors, Reticles

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Proceedings Article | 16 March 2016 Paper

Paper

Lower BW and its impact on the patterning performance

Paolo Alagna, Greg Rechtsteiner, Vadim Timoshkov, Patrick Wong, Will Conley, Jan Baselmans

Proceedings Volume 9780, 978008 (2016) https://doi.org/10.1117/12.2219945

KEYWORDS: Optical lithography, Light sources, Lithography, Deep ultraviolet, Data modeling, Electroluminescence, Logic, Metals, Optical proximity correction, Etching

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Proceedings Article | 4 September 2015 Paper

Paper

Advanced process characterization of a 10nm Metal 1 Logic layer using light source modulation and monitoring

Paolo Alagna, Omar Zurita, Vadim Timoshkov, Patrick Wong, Greg Rechtsteiner, Jan Baselmans, Julien Mailfert, Will Conley, Simon Hsieh

Proceedings Volume 9661, 966105 (2015) https://doi.org/10.1117/12.2196862

KEYWORDS: Light sources, Semiconducting wafers, Optical lithography, Critical dimension metrology, Logic, Line width roughness, Optical proximity correction, Metals, Scanners, Modulation

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Proceedings Article | 18 March 2015 Paper

Paper

Optimum ArFi laser bandwidth for 10nm node logic imaging performance

Paolo Alagna, Omar Zurita, Vadim Timoshkov, Patrick Wong, Gregory Rechtsteiner, Jan Baselmans, Julien Mailfert

Proceedings Volume 9426, 942609 (2015) https://doi.org/10.1117/12.2085823

KEYWORDS: Optical lithography, Logic, Semiconducting wafers, Line width roughness, Light sources, Photomasks, Optical proximity correction, Lithography, Process control, Critical dimension metrology

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Proceedings Article | 1 October 2013 Paper

Paper

Imaging challenges in 20nm and 14nm logic nodes: hot spots performance in Metal1 layer

V. Timoshkov, D. Rio, H. Liu, W. Gillijns, J. Wang, P. Wong, D. Van Den Heuvel, V. Wiaux, P. Nikolsky, J. Finders

Proceedings Volume 8886, 88860N (2013) https://doi.org/10.1117/12.2030968

KEYWORDS: Reticles, Critical dimension metrology, Semiconducting wafers, Logic, Tolerancing, Double patterning technology, Standards development, Metals, Scanners

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SPIE Journal Paper | 4 September 2013

Key contributors for improvement of line width roughness, line edge roughness, and critical dimension uniformity: 15 nm half-pitch patterning with extreme ultraviolet and self-aligned double patterning

Kaidong Xu, Laurent Souriau, David Hellin, Janko Versluijs, Patrick Wong, Diziana Vangoidsenhoven, Nadia Vandenbroeck, Harold Dekkers, Xiaoping Shi, Johan Albert, Chi Lim Tan, Johan Vertommen, Bart Coenegrachts, Isabelle Orain, Yoshie Kimura, Vincent Wiaux, Werner Boullart

JM3, Vol. 12, Issue 04, 041302, (September 2013) https://doi.org/10.1117/12.10.1117/1.JMM.12.4.041302

KEYWORDS: Line width roughness, Optical lithography, Etching, Line edge roughness, Photomasks, Silicon, Extreme ultraviolet lithography, Plasma, Plasma enhanced chemical vapor deposition, Lithography

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Proceedings Article | 12 April 2013 Paper

Paper

Simulation of spacer-based SADP (Self-Aligned Double-Patterning) for 15nm half pitch

Stewart Robertson, Patrick Wong, Janko Versluijs, Vincent Wiaux

Proceedings Volume 8683, 86830Y (2013) https://doi.org/10.1117/12.2013877

KEYWORDS: Lithography, Etching, Double patterning technology, Optical lithography, Extreme ultraviolet lithography, Extreme ultraviolet, Semiconducting wafers, Ions, Design for manufacturability, Manufacturing

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Proceedings Article | 29 March 2013 Paper

Paper

15nm HP patterning with EUV and SADP: key contributors for improvement of LWR, LER, and CDU

K. Xu, L. Souriau, D. Hellin, J. Versluijs, P. Wong, D. Vangoidsenhoven, N. Vandenbroeck, H. Dekkers, X. Shi, J. Albert, C. Tan, J. Vertommen, B. Coenegrachts, I. Orain, Y. Kimura, V. Wiaux, W. Boullart

Proceedings Volume 8685, 86850C (2013) https://doi.org/10.1117/12.2011586

KEYWORDS: Line width roughness, Etching, Optical lithography, Line edge roughness, Photomasks, Extreme ultraviolet lithography, Photoresist materials, Plasma, Silicon, Lithography

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Proceedings Article | 13 March 2012 Paper

Paper

Interactions between imaging layers during LPLE double patterning lithography

Stewart Robertson, Patrick Wong, Peter De Bisschop, Nadia Vandenbroeck, Vincent Wiaux

Proceedings Volume 8326, 83260B (2012) https://doi.org/10.1117/12.918058

KEYWORDS: Finite element methods, Photoresist processing, Double patterning technology, Diffusion, Lithography, Critical dimension metrology, Data modeling, Thermal modeling, Refractive index, Refraction

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Proceedings Article | 13 March 2012 Paper

Paper

Litho1-litho2 proximity differences for LELE and LPLE double patterning processes

Patrick Wong, Peter De Bisschop, Stewart Robertson, Nadia Vandenbroeck, John Biafore, Vincent Wiaux, Jeroen Van de Kerkhove

Proceedings Volume 8326, 83260E (2012) https://doi.org/10.1117/12.916156

KEYWORDS: Double patterning technology, Semiconducting wafers, Data modeling, Finite element methods, Thermal modeling, Lithography, Metals, Photoresist processing, Surface plasmons, Optical lithography

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Proceedings Article | 23 March 2011 Paper

Paper

Characterization of a 'thermal freeze' litho-litho-etch (LLE) process for predictive simulation

Stewart Robertson, Patrick Wong, John Biafore, Mark Smith, Nadia Vandenbroeck, Vincent Wiaux

Proceedings Volume 7973, 79730L (2011) https://doi.org/10.1117/12.879508

KEYWORDS: Data modeling, Photoresist processing, Calibration, Thermal modeling, Double patterning technology, Finite element methods, Photoresist materials, Process modeling, Scanning electron microscopy, Wafer-level optics

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Proceedings Article | 4 March 2010 Paper

Paper

Litho-process-litho for 2D 32nm hp Logic and DRAM double patterning

Patrick Wong, Vincent Wiaux, Staf Verhaegen, Nadia Vandenbroeck

Proceedings Volume 7640, 76400I (2010) https://doi.org/10.1117/12.846998

KEYWORDS: Double patterning technology, Thin film coatings, Optical lithography, Logic, Semiconducting wafers, Electroluminescence, Image processing, Line width roughness, Printing, Surface plasmons

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Proceedings Article | 12 December 2009 Paper

Paper

Low temperature plasma-enhanced ALD enables cost-effective spacer defined double patterning (SDDP)

Julien Beynet, Patrick Wong, Andy Miller, Sabrina Locorotondo, Diziana Vangoidsenhoven, Tae-Ho Yoon, Marc Demand, Hyung-Sang Park, Tom Vandeweyer, Hessel Sprey, Yong-Min Yoo, Mireille Maenhoudt

Proceedings Volume 7520, 75201J (2009) https://doi.org/10.1117/12.836979

KEYWORDS: Line width roughness, Etching, Semiconducting wafers, Photoresist materials, Double patterning technology, Atomic layer deposition, Optical lithography, Silica, Plasma enhanced chemical vapor deposition, Silicon

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Proceedings Article | 23 March 2007 Paper

Paper

Formulated surface conditioners in 50-nm immersion lithography: simultaneously reducing pattern collapse and line-width roughness

Minoru Sugiyama, Masakazu Sanada, Suping Wang, Patrick Wong, Stephan Sinkwitz, Manuel Jaramillo, Gene Parris

Proceedings Volume 6519, 651927 (2007) https://doi.org/10.1117/12.712188

KEYWORDS: Line width roughness, Electroluminescence, Semiconducting wafers, Lithography, Immersion lithography, Finite element methods, Photoresist processing, Scanners, Scanning electron microscopy, Optical lithography

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Proceedings Article | 29 March 2006 Paper

Paper

Linewidth roughness reduction at the 55 nm node through combination of classical process optimization and application of surface conditioner solutions

Patrick Wong, Wendy Gehoel, Stephan Sinkwitz, Peng Zhang, Manuel Jaramillo, Madhukar Rao, Bridget Horvath, Brenda Ross, Shawn Cassel

Proceedings Volume 6153, 61533V (2006) https://doi.org/10.1117/12.657875

KEYWORDS: Line width roughness, Electroluminescence, Semiconducting wafers, Image processing, Scanners, Platinum, Scanning electron microscopy, Critical dimension metrology, Image resolution, Resist chemistry

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Proceedings Article | 4 May 2005 Paper

Paper

Combined pattern collapse and LWR control at the 70 nm node through application of novel surface conditioner solutions

Peng Zhang, Manuel Jaramillo, Madhukar Rao, Brenda Ross, Bridget Horvath, Patrick Wong, Wendy Gehoel, Stephan Sinkwitz

Proceedings Volume 5753, (2005) https://doi.org/10.1117/12.600039

KEYWORDS: Line width roughness, Semiconducting wafers, Lithography

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Proceedings Article | 30 July 2002 Paper

Paper

157-nm technology: Where are we today?

Jan Mulkens, Thomas Fahey, James McClay, Judon Stoeldraijer, Patrick Wong, Martin Brunotte, Birgit Mecking

Proceedings Volume 4691, (2002) https://doi.org/10.1117/12.474610

KEYWORDS: Pellicles, Lithography, Reticles, Photomasks, Contamination, Crystals, Lens design, Birefringence, Silica, Distortion

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Proceedings Article | 24 July 2002 Paper

Paper

Progress in 157-nm resist performance and potential

Patrick Wong, Stephan Sinkwitz, Steven Hansen, Anne-Marie Goethals, Will Conley

Proceedings Volume 4690, (2002) https://doi.org/10.1117/12.474250

KEYWORDS: Electroluminescence, Semiconducting wafers, Chemistry, Lithography, Transparency, Silicon, Binary data, Photomasks, Silicon films, Video

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Proceedings Article | 24 August 2001 Paper

Paper

Process optimization for sub-100-nm gate patterns using phase edge lithography

Koen van Ingen Schenau, Bert Vleeming, Wendy Gehoel-van Ansem, Patrick Wong, Geert Vandenberghe

Proceedings Volume 4345, (2001) https://doi.org/10.1117/12.436849

KEYWORDS: Photoresist materials, Photomasks, Lithography, Photoresist developing, Critical dimension metrology, Chemistry, Reticles, Optical lithography, Antireflective coatings, Capillaries

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Showing 5 of 24 publications

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