Mr. G. William Banke Profile

G. William Banke

SPIE Involvement:

Author | Instructor

Publications (20)

SPIE Journal Paper | 27 February 2012

Review of reference metrology for nanotechnology: significance, challenges, and solutions

Vladimir Ukraintsev, G. William Banke

JM3, Vol. 11, Issue 1, 011010, (February 2012) https://doi.org/10.1117/12.10.1117/1.JMM.11.1.011010

KEYWORDS: Metrology, Atomic force microscopy, Nanotechnology, Critical dimension metrology, Transmission electron microscopy, Scanning electron microscopy, Semiconductors, Silicon, Coating, Silicon carbide

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Proceedings Article | 24 August 2010 Paper

Reference metrology for nanotechnology: significance, challenges and solutions

Vladimir Ukraintsev, Bill Banke

Proceedings Volume 7767, 77670C (2010) https://doi.org/10.1117/12.860666

KEYWORDS: Metrology, Atomic force microscopy, Critical dimension metrology, Transmission electron microscopy, Semiconductors, Scanning electron microscopy, Nanotechnology, Coating, Silicon, Silicon carbide

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Proceedings Article | 24 March 2009 Paper

Monitoring measurement tools: new methods for driving continuous improvements in fleet measurement uncertainty

Eric Solecky, Chas Archie, Matthew Sendelbach, Ron Fiege, Mary Zaitz, Dmitriy Shneyder, Carlos Strocchia-rivera, Andres Munoz, Srinivasan Rangarajan, William Muth, Andrew Brendler, Bill Banke, Bernd Schulz, Carsten Hartig, Jon-Tobias Hoeft, Alok Vaid, Mark Kelling, Benjamin Bunday, John Allgair

Proceedings Volume 7272, 72721H (2009) https://doi.org/10.1117/12.814089

KEYWORDS: Semiconducting wafers, Metrology, Scatterometry, Process control, Calibration, Manufacturing, Overlay metrology, Time metrology, Atomic force microscopy

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Ever shrinking measurement uncertainty requirements are difficult to achieve for a typical metrology toolset, especially over the entire expected life of the fleet. Many times, acceptable performance can be demonstrated during brief evaluation periods on a tool or two in the fleet. Over time and across the rest of the fleet, the most demanding processes often have measurement uncertainty concerns that prevent optimal process control, thereby limiting premium part yield, especially on the most aggressive technology nodes. Current metrology statistical process control (SPC) monitoring techniques focus on maintaining the performance of the fleet where toolset control chart limits are derived from a stable time period. These tools are prevented from measuring product when a statistical deviation is detected. Lastly, these charts are primarily concerned with daily fluctuations and do not consider the overall measurement uncertainty. It is possible that the control charts implemented for a given toolset suggest a healthy fleet while many of these demanding processes continue to suffer measurement uncertainty issues. This is especially true when extendibility is expected in a given generation of toolset. With this said, there is a need to continually improve the measurement uncertainty of the fleet until it can no longer meet the needed requirements at which point new technology needs to be entertained. This paper explores new methods in analyzing existing SPC monitor data to assess the measurement performance of the fleet and look for opportunities to drive improvements. Long term monitor data from a fleet of overlay and scatterometry tools will be analyzed. The paper also discusses using other methods besides SPC monitors to ensure the fleet stays matched; a set of SPC monitors provides a good baseline of fleet stability but it cannot represent all measurement scenarios happening in product recipes. The analyses presented deal with measurement uncertainty on non-measurement altering metrology toolsets such as scatterometry, overlay, atomic force microscopy (AFM) or thin film tools. The challenges associated with monitoring toolsets that damage the sample such as the CD-SEMs will also be discussed. This paper also explores improving the monitoring strategy through better sampling and monitor selection. The industry also needs to converge regarding the metrics used to describe the matching component of measurement uncertainty so that a unified approach is reached regarding how to best drive the much needed improvements. In conclusion, there will be a discussion on automating these new methods3,4 so they can complement the existing methods to provide a better method and system for controlling and driving matching improvements in the fleet.

Proceedings Article | 23 March 2009 Open Access

The measurement uncertainty challenge of advanced patterning development

Narender Rana, Chas Archie, Wei Lu, Bill Banke

Proceedings Volume 7272, 727203 (2009) https://doi.org/10.1117/12.814170

KEYWORDS: Metrology, Critical dimension metrology, Optical proximity correction, Scanners, Calibration, Semiconducting wafers, Optical lithography, Scanning electron microscopy, Data modeling, Lithography

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The trend of reducing the feature size in ICs requires tightening control of critical dimension (CD) variability for optimal device performance. This drives a need to be able to accurately characterize the variability in order to have reliable metrics to drive improvement in development. Variation in CDs can come from various sectors such as mask, OPC, litho & Etch. Metrology is involved in all sectors and it is important to understand the accuracy limitations in metrology contributing to CD variability. Inaccuracy of the CD-SEM algorithm arising from profile variations is one example. Profile variation can result from process and design variation. Total Measurement Uncertainty (TMU) is a metric dependent on the precision of tool under test (CD-SEM here) and relative accuracy, and can track the accuracy of CD measurements in the presence of varying profiles. This study explores metrology limitations to capture the design and process contributions to the CD variation at the post litho step. In this paper lithography scanner focus-exposure matrix wafer was used to capture the process variation. CD and profile data is taken from varying focus fields. The sample plan described in this paper also covers the design variation by including nested features and isolated features of various sizes. Appropriate averaging methodology has been adopted in an attempt to decouple the process and design related CD variation to TMU. While the tool precision can be suppressed by sufficient averaging, the relative accuracy cannot. This relative accuracy is affected by the complex CD-SEM probe to sample interactions and sensitivity of CD-SEM algorithms to different feature profiles. One consequence of this is the average offsets between physical CDs (CDAFM) and SEM CDs change significantly with the defocus. TMU worsens as the focus range is increased from nominal focus. This paper explores why this is so and also discusses the challenges for the CD-AFM to accurately measure complex and varying profiles. There is a discussion of the implications of this study for the production measurement uncertainty, OPC calibration measurement at process of record conditions, and for process window OPC. Results for optimizing the CD-SEM algorithm to achieve superior accuracy across both design and process induced variation will also be presented.

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Proceedings Article | 16 April 2008 Paper

Impact of sampling on uncertainty: semiconductor dimensional metrology applications

Benjamin Bunday, Bart Rijpers, Bill Banke, Chas Archie, Ingrid Peterson, Vladimir Ukraintsev, Thomas Hingst, Masafumi Asano

Proceedings Volume 6922, 69220X (2008) https://doi.org/10.1117/12.772993

KEYWORDS: Critical dimension metrology, Semiconducting wafers, Metrology, Process control, Statistical analysis, Calibration, Scatterometry, Multiphoton fluorescence microscopy, Scanning electron microscopy, Etching

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Proceedings Article | 25 March 2008 Paper

Traceable calibration of AFM step height measurements for integrated circuit manufacturing

James Robert, Bill Banke, Ronald Dixson, Carlos Strocchia-Rivera

Proceedings Volume 6922, 69223V (2008) https://doi.org/10.1117/12.778463

KEYWORDS: Calibration, Manufacturing, Scanners, Metrology, Silicon, Atomic force microscopy, Line scan image sensors, Error analysis, Surface roughness, Standards development

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Proceedings Article | 5 April 2007 Paper

Realizing "value-added" metrology

Benjamin Bunday, Pete Lipscomb, John Allgair, Dilip Patel, Mark Caldwell, Eric Solecky, Chas Archie, Jennifer Morningstar, Bryan Rice, Bhanwar Singh, Jason Cain, Iraj Emami, Bill Banke, Alfredo Herrera, Vladamir Ukraintsev, Jerry Schlessinger, Jeff Ritchison

Proceedings Volume 6518, 65181K (2007) https://doi.org/10.1117/12.714216

KEYWORDS: Metrology, Overlay metrology, Inspection, Semiconducting wafers, Process control, Yield improvement, Critical dimension metrology, Optical proximity correction, Etching, Lithography

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The conventional premise that metrology is a "non-value-added necessary evil" is a misleading and dangerous assertion, which must be viewed as obsolete thinking. Many metrology applications are key enablers to traditionally labeled "value-added" processing steps in lithography and etch, such that they can be considered integral parts of the processes. Various key trends in modern, state-of-the-art processing such as optical proximity correction (OPC), design for manufacturability (DFM), and advanced process control (APC) are based, at their hearts, on the assumption of fine-tuned metrology, in terms of uncertainty and accuracy. These trends are vehicles where metrology thus has large opportunities to create value through the engineering of tight and targetable process distributions. Such distributions make possible predictability in speed-sorts and in other parameters, which results in high-end product. Additionally, significant reliance has also been placed on defect metrology to predict, improve, and reduce yield variability. The necessary quality metrology is strongly influenced by not only the choice of equipment, but also the quality application of these tools in a production environment. The ultimate value added by metrology is a result of quality tools run by a quality metrology team using quality practices. This paper will explore the relationships among present and future trends and challenges in metrology, including equipment, key applications, and metrology deployment in the manufacturing flow. Of key importance are metrology personnel, with their expertise, practices, and metrics in achieving and maintaining the required level of metrology performance, including where precision, matching, and accuracy fit into these considerations. The value of metrology will be demonstrated to have shifted to "key enabler of large revenues," debunking the out-of-date premise that metrology is "non-value-added." Examples used will be from critical dimension (CD) metrology, overlay, films, and defect metrology.

Proceedings Article | 5 April 2007 Paper

Leveraging LER to minimize linewidth measurement uncertainty in a calibration exercise

James Robert, Bill Banke, Ronald Dixson

Proceedings Volume 6518, 65184T (2007) https://doi.org/10.1117/12.713101

KEYWORDS: Calibration, Line width roughness, Metrology, Line edge roughness, Standards development, Semiconductors, Atomic force microscopy, Crystals, Error analysis, Line scan image sensors

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Proceedings Article | 24 March 2006 Paper

Metrology tool fleet management: applying FMP tool matching and monitoring concepts to an overlay fleet

Jennifer Morningstar, Eric Solecky, Chas Archie, Bill Banke

Proceedings Volume 6152, 615212 (2006) https://doi.org/10.1117/12.655578

KEYWORDS: Overlay metrology, Metrology, Process control, Semiconducting wafers, Tolerancing, Diagnostics, Back end of line, Visualization, Inspection, Optical lithography

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Proceedings Article | 10 May 2005 Paper

New comprehensive metrics and methodology for metrology tool fleet matching

Eric Solecky, Chas Archie, Bill Banke

Proceedings Volume 5752, (2005) https://doi.org/10.1117/12.602330

KEYWORDS: Diagnostics, Metrology, Manufacturing, Statistical analysis, Calibration, Data acquisition, Process control, Picosecond phenomena, Semiconducting wafers, Data modeling

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Proceedings Article | 24 May 2004 Paper

Correlating scatterometry to CD-SEM and electrical gate measurements at the 90-nm node using TMU analysis

Matthew Sendelbach, Charles Archie, Bill Banke, Jason Mayer, Hideaki Nii, Pedro Herrera, Matt Hankinson

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.538009

KEYWORDS: Scatterometry, Semiconducting wafers, Scatter measurement, Scanning electron microscopy, Critical dimension metrology, Metrology, Manufacturing, Electrodes, Data modeling, Capacitance

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Proceedings Article | 24 May 2004 Paper

Feedforward of mask open measurements on an integrated scatterometer to improve gate linewidth control

Matthew Sendelbach, Wesley Natzle, Charles Archie, Bill Banke, Dan Prager, Dan Engelhard, Jason Ferns, Asao Yamashita, Merritt Funk, Fumihiko Higuchi, Masayuki Tomoyasu

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.537969

KEYWORDS: Semiconducting wafers, Etching, Critical dimension metrology, Calibration, Metrology, Control systems, Photomasks, Silver, Error analysis, Silicon

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Proceedings Article | 24 May 2004 Paper

Reducing measurement uncertainty drives the use of multiple technologies for supporting metrology

Bill Banke, Charles Archie, Matthew Sendelbach, Jim Robert, James Slinkman, Phil Kaszuba, Rick Kontra, Mick DeVries, Eric Solecky

Proceedings Volume 5375, (2004) https://doi.org/10.1117/12.546880

KEYWORDS: Metrology, Transmission electron microscopy, Calibration, Error analysis, Atomic force microscopy, Scatterometry, Manufacturing, Capacitance, Statistical analysis, Scanning electron microscopy

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Perhaps never before in semiconductor microlithography has there been such an interest in the accuracy of measurement. This interest places new demands on our in-line metrology systems as well as the supporting metrology for verification. This also puts a burden on the users and suppliers of new measurement tools, which both challenge and complement existing manufacturing metrology. The metrology community needs to respond to these challenges by using new methods to assess the fab metrologies. An important part of this assessment process is the ability to obtain accepted reference measurements as a way of determining the accuracy and Total Measurement Uncertainty (TMU) of an in-line critical dimension (CD). In this paper, CD can mean any critical dimension including, for example, such measures as feature height or sidewall angle. This paper describes the trade-offs of in-line metrology systems as well as the limitations of Reference Measurement Systems (RMS). Many factors influence each application such as feature shape, material properties, proximity, sampling, and critical dimension. These factors, along with the metrology probe size, interaction volume, and probe type such as e-beam, optical beam, and mechanical probe, are considered. As the size of features shrinks below 100nm some of the stalwarts of reference metrology come into question, such as the electrically determined transistor gate length. The concept of the RMS is expanded to show how multiple metrologies are needed to achieve the right balance of accuracy and sampling. This is also demonstrated for manufacturing metrology. Various comparisons of CDSEM, scatterometry, AFM, cross section SEM, electrically determined CDs, and TEM are shown. An example is given which demonstrates the importance in obtaining TMU by balancing accuracy and precision for selecting manufacturing measurement strategy and optimizing manufacturing metrology. It is also demonstrated how the necessary supporting metrology will bring together formerly unlinked technology fields requiring new measurement science. The emphasis on accuracy will increase the importance and role of NIST and similar metrology organizations in supporting the semiconductor industry in this effort.

Proceedings Article | 2 June 2003 Paper

New apparent beam width artifact and measurement methodology for CD-SEM resolution monitoring

Jason Mayer, Kylee Huizenga, Eric Solecky, Charles Archie, G. Banke, Robert Cogley, Claudine Nathan, James Robert

Proceedings Volume 5038, (2003) https://doi.org/10.1117/12.485035

KEYWORDS: Semiconducting wafers, Line edge roughness, Atomic force microscopy, Scanning electron microscopy, Voltage controlled current source, Optical resolution, Manufacturing, Reticles, Edge roughness, Microelectronics

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Proceedings Article | 22 August 2001 Paper

Monitoring printing fidelity with image correlation measurements on the CD SEM

Charles Archie, Eric Solecky, Timothy Hayes, G. Banke

Proceedings Volume 4344, (2001) https://doi.org/10.1117/12.436764

KEYWORDS: Printing, Pattern recognition, Image processing, Chlorine, Image enhancement, Critical dimension metrology, Scanning electron microscopy, Lithography, Finite element methods, Semiconducting wafers

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Proceedings Article | 22 August 2001 Paper

Three-dimensional top-down metrology: a viable alternative to AFM or cross-section?

Eric Solecky, Charles Archie, Timothy Hayes, G. Banke, Roger Cornell

Proceedings Volume 4344, (2001) https://doi.org/10.1117/12.436762

KEYWORDS: Atomic force microscopy, 3D metrology, Metrology, Critical dimension metrology, Scanning electron microscopy, Semiconducting wafers, Process control, Electron beams, Reconstruction algorithms, Optical simulations

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Proceedings Article | 18 August 2000 Paper

Benchmarking of advanced CD-SEMs against a new unified specification for sub-0.18-um lithography

Alain Deleporte, John Allgair, Charles Archie, G. Banke, Michael Postek, Jerry Schlesinger, Andras Vladar, Arnold Yanof

Proceedings Volume 4181, (2000) https://doi.org/10.1117/12.395750

KEYWORDS: Lithography, Standards development, Scanning electron microscopy, Electron microscopes

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Proceedings Article | 2 June 2000 Paper

Benchmarking of advanced CD-SEMs against the new unified specification for sub-0.18-um lithography

Alain Deleporte, John Allgair, Charles Archie, G. Banke, Michael Postek, Jerry Schlesinger, Andras Vladar, Arnold Yanof

Proceedings Volume 3998, (2000) https://doi.org/10.1117/12.386524

KEYWORDS: Semiconducting wafers, Scanning electron microscopy, Metrology, Atomic force microscopy, Wafer testing, Contamination, Manufacturing, Critical dimension metrology, Lithography, Standards development

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The Advanced Metrology Advisory Group (AMAG) comprised of representatives from International SEMATECH consortium member companies and the National Institute of Standards and Technology have joined to develop a new unified specification for an advanced scanning electron microscope critical dimension measurement instrument (CD-SEM). (Allgair, et al., 1998) This paper describes the results of an effort to benchmark six CD-SEM instruments according to this specification. The consensus among the AMAG metrologists was that many critical areas of performance of CD-SEMs required improvement. Following this assessment this specification for benchmarking was developed. The advanced CD-SEM specification addresses several critical areas for improvement, each with its own a separate section. The critical areas covered are: precision, accuracy, charging and contamination, performance matching, pattern recognition and stage navigation accuracy, throughput, and instrumentation outputs. Each section of the specification contains a concise definition of the respective performance parameter, and wherever appropriate refers to ISO definitions. The test methodology is described, complete with the relevant statistical analysis. Many parameters (including precision, matching, and magnification accuracy) are numerically specified to be consistent with the International Technology Roadmap for Semiconductors (ITRS, 1999). Other parameters, such as charging and linewidth accuracy, are targeted with guidelines for improvement. The test wafers developed for determining the level of compliance with the specification are also discussed. The AMAG circulated this report among the metrology instrument suppliers and conferred with them. Certain components of the specification have already been adopted by some of the manufacturers in their newer metrology instruments. International SEMATECH fabricated the AMAG test wafers described herein. Measurements on six state-of-the-art metrology instruments using the AMAG test wafers have been carried out and the results were processed according to this specification. A review of the results is presented in this paper.

Proceedings Article | 14 June 1999 Paper

Characteristics of accuracy for CD metrology

G. Banke, Charles Archie

Proceedings Volume 3677, (1999) https://doi.org/10.1117/12.350818

KEYWORDS: Calibration, Semiconducting wafers, Error analysis, Metrology, Scanning electron microscopy, Critical dimension metrology, Manufacturing, Statistical analysis, Atomic force microscopy, Precision measurement

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Proceedings Article | 8 June 1998 Paper

Toward a unified advanced CD-SEM specification for sub-0.18-um technology

John Allgair, Charles Archie, G. Banke, E. Hal Bogardus, Joseph Griffith, Herschel Marchman, Michael Postek, Lumdas Saraf, Jerry Schlesinger, Bhanwar Singh, Neal Sullivan, Lee Trimble, Andras Vladar, Arnold Yanof

Proceedings Volume 3332, (1998) https://doi.org/10.1117/12.308724

KEYWORDS: Semiconducting wafers, Metrology, Pattern recognition, Scanning electron microscopy, Contamination, Lithography, Calibration, Standards development, Wafer testing, Electron microscopes

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Showing 5 of 20 publications

Course Instructor

SC705: Instruments and Methodologies for Accurate Metrology and Fleet Matching

This course teaches the methodologies of total measurement uncertainty (TMU) analysis and fleet measurement precision (FMP) analysis. The course concentrates on the application of a general form of regression analysis (Mandel) to the applications of measurement tool matching, and measurement instrument assessment and optimization. Case studies will be selected from a collection of examples from measurement technologies such as CD-SEM, scatterometer, overlay, and CD-AFM. These examples will provide the seminar participants with the knowledge and tools necessary for conducting single tool and multiple tool assessments and optimizations.

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