Techniques for identifying and mitigating effects of process variation on the electrical performance of integrated circuits
are described. These results are from multi-discipline, collaborative university-industry research and emphasize
anticipating sources of variation up-stream early in the circuit design phase. The lithography physics research includes
design and testing electronic monitors in silicon at 45 nm and
fast-CAD tools to identify systematic variations for entire
chip layouts. The device research includes the use of a spacer (sidewall transfer) gate fabrication process to suppress
random variability components. The Design-for-Manufacturing research includes double pattern decomposition in the
presence of bimodal CD behavior, process-aware reticle inspection, tool-aware dose trade-off between leakage and
speed, the extension of timing analysis methodology to capture across process-window effects and electrical processwindow
characterization.
Differences in imaging behaviour between lithographic systems of the same wavelength result in variations of optical
proximity effects (OPE). A way to compensate these irregularities is through scanner tuning. In scanner tuning, scanner
specific adjustments are obtained through the determination of scanner knob sensitivities of relevant structures followed
by an optimization to adjust the structure CD values to be close to the desired values.
Traditionally, scanner tuning methods have relied heavily on wafer-based CD metrology to characterize both the initial
mismatch as well as the sensitivities of CDs to the scanner tuning knobs. These methods have proven very successful in
reducing the mismatch, but their deployment in manufacturing has been hampered by the metrology effort. In this paper,
we explore the possibility of using ASML's LithoTuner PatternMatcher FullChip (PMFC) computational lithography
tool to reduce the dependence on wafer CD metrology.
One tuning application using flexray illumination instead of traditional scanner knobs is presented in this work; in this
application individual critical features in wafer printing are improved without affecting other sites. The limited impact of
tuning on other structures is verified through full-chip LMC runs. Potential uses of this technology are for process
transfers from one fab to another where the OPC signature in the receiving fab is similar but not identical to the signature
of the originating fab.
The tuning application is investigated with respect to its applicability in a production environment, including further
metrology effort reduction by using scatterometry tools.
IC manufacturers have a strong demand for transferring a working process from one scanner to another. Recently, a
programmable illuminator (FlexRayTM) became available on ASML ArF immersion scanners that, besides all the
parameterized source shapes of the earlier AerialTM illuminator (based on diffractive optical elements) can also produce
any desired freeform source shape. As a consequence, a fabrication environment may have scanners with each of the
illuminator types so both FlexRay-to-Aerial and FlexRay-to-FlexRay matching is of interest. Moreover, the FlexRay
illuminator itself is interesting from a matching point-of-view, as numerous degrees of freedom are added to the
matching tuning space.
This paper demonstrates how the upgrade of an exposure tool from Aerial to FlexRay illuminator shows identical
proximity behavior without any need for scanner tuning. Also, an assessment of the imaging correspondence between
exposure tools each equipped with a FlexRay illuminator is made. Finally, for a series of use-cases where proximity
differences do exist, the application of FlexRay source tuning is demonstrated. It shows an enhancement of the scanner
matching capabilities, because FlexRay source tuning enables matching where traditional NA and sigma tuning are
shortcoming. Moreover, it enables tuning of freeform sources where sigma tuning is not relevant. Pattern MatcherTM
software of ASML Brion is demonstrated for the calculation of the optimized FlexRay tuned sources.
An algorithm is presented which performs a model-based colouring of a given layout for double patterning.
The algorithm searches the space of patterns which can be printed with a particular wavelength and numerical
aperture, and seeks to find a pair of patterns which combine to produce the desired target layout. This is
achieved via a cost function which encodes the geometry of the layout and allowable edge placement tolerances.
If the layout is not printable by double patterning, then the algorithm provides a closest solution and indicates
hotspots where the target is not feasible.
This paper provides details of the implementation of a new design hotspot classification and detection system, and
presents results of using the system to detect hotspots in layouts. A large set of hotspot snippets is grouped into a small
number of clusters containing geometrically similar hotspots. A fast incremental clustering algorithm is used to perform
this task efficiently on very large datasets. Each cluster is analyzed to produce a characterization of a class of hotspots,
and a pattern matcher is used to detect hotspots in new design layouts based on the hotspot class descriptions.
This paper proposes a new design check system that works in three steps. First, hotspots such as pinching/bridging are
recognized in a product layout based on thorough process simulations. Small layout snippets centered on hotspots are
clipped from the layout and similarities between these snippets are calculated by computing their overlapping areas. This
is accomplished using an efficient, rectangle-based algorithm. The snippet overlapping areas can be weighted by a
function derived from the optical parameters of the lithography process. Second, these hotspots are clustered using a
hierarchical clustering algorithm. Finally, each cluster is analyzed in order to identify the common cause of failure for all
the hotspots in that cluster, and its representative pattern is fed to a pattern-matching tool for detecting similar hotspots
in new design layouts. Thus, the long list of hotspots is reduced to a small number of meaningful clusters and a library of
characterized hotspot types is produced. This could lead to automated hotspot corrections that exploit the similarities of
hotspots occupying the same cluster. Such an application will be the subject of a future publication.
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