Mr. Mark Slezak Profile

Mark Slezak

Director: Lithography Technology at JSR Micro Inc

SPIE Involvement:

Author

Publications (26)

Proceedings Article | 27 March 2014 Paper

Anti-spacer double patterning

Michael Hyatt, Karen Huang, Anton DeVilliers, Zhi Liu, Mark Slezak

Proceedings Volume 9051, 905118 (2014) https://doi.org/10.1117/12.2045617

KEYWORDS: Double patterning technology, Line width roughness, Optical lithography, Photoresist processing, Coating, Semiconducting wafers, Etching, Lithography, Photoresist materials, Plasma

Read Abstract +

Proceedings Article | 19 March 2012 Paper

Design, synthesis, and characterization of KrF negative developable bottom anti-reflective coating materials

Nicolette Fender, Karen Huang, Cherry Tang, Steven Holmes, Kuang-Jung Chen, Wu-Song Huang, Mark Slezak, Brian Osborn, Sen Liu, Ranee Kwong, Chung-Hsi Wu

Proceedings Volume 8325, 83251B (2012) https://doi.org/10.1117/12.916158

KEYWORDS: Polymers, Reflectivity, Silicon, Semiconducting wafers, Bottom antireflective coatings, Lithography, Chromophores, Critical dimension metrology, Silicon films, Solids

Read Abstract +

Proceedings Article | 16 April 2011 Paper

Optimization of pitch-split double patterning photoresist for applications at the 16nm node

Yunpeng Yin, Rex Chen, Matthew Colburn, Terry Spooner, Chiew-seng Koay, Karen Petrillo, Mark Slezak, Sumanth Kini, Brian Osborn, Hideyuki Tomizawa, Lovejeet Singh, Scott Halle, John Arnold, Nicolette Fender, Sean Burns, Cherry Tang, Steven Holmes, Rao Varanasi, Sen Liu, Guillaume Landie, Shyng-Tsong Chen

Proceedings Volume 7972, 79720G (2011) https://doi.org/10.1117/12.881489

KEYWORDS: Photoresist processing, Reactive ion etching, Lithography, Photomasks, Dielectrics, Etching, Scanning electron microscopy, Double patterning technology, Semiconductors, Optical lithography

Read Abstract +

Proceedings Article | 16 April 2011 Paper

Implementation of KrF DBARCs for implant applications on advanced lithography nodes

Alice Guerrero, Mark Slezak, Carlton Washburn, Charlyn Stroud, Joyce Lowes, Michael Weigand, David Torres, Shalini Sharma, Cherry Tang, Gary Dabbagh

Proceedings Volume 7972, 797227 (2011) https://doi.org/10.1117/12.879464

KEYWORDS: Picosecond phenomena, Photoresist materials, Lithography, Semiconducting wafers, Critical dimension metrology, Photoresist developing, Polymers, Silicon, Reflectivity, Photomasks

Read Abstract +

Proceedings Article | 30 March 2010 Paper

Fabrication of dual damascene BEOL structures using a multilevel multiple exposure (MLME) scheme, part 2: RIE-based pattern transfer and completion of dual damascene process yielding an electrically functional via chain

Matthew Colburn, Nicolette Fender, Mark Slezak, Rex Chen, Eric Joseph, Shyng-Tsong Chen, Stefan Harrer, Dave Horak, Sebastian Engelmann, John Arnold, Steven Holmes, Ronald Della Guardia, Cherry Tang, Rao Varanasi, Dario Goldfarb, Yunpeng Yin

Proceedings Volume 7639, 763919 (2010) https://doi.org/10.1117/12.846593

KEYWORDS: Back end of line, Dielectrics, Etching, Lithography, Reactive ion etching, Photoresist materials, Optical lithography, Semiconducting wafers, Copper, Polishing

Read Abstract +

A novel back-end-of-line (BEOL) patterning and integration process termed Multi-Level Multiple Exposure (MLME) technique is herein introduced. The MLME technique simplifies BEOL dual damascene (DD) integration while simultaneously being applicable to all BEOL levels. It offers a patterning resolution reaching into the sub-100nm region and improves semiconductor manufacturing cost and throughput. MLME employs a dual-layer imaging stack (via + trench resists) cast onto a customized etch transfer multilayer stack. This process implements a strict litho-litho-etch sequence for transferring the trench- and via-patterns into the dielectric layer. Under the MLME scheme, two imaging steps (i.e. via- and trench-level patterning) are executed consecutively followed by a dry etch process that transfers the lithographically-formed patterns into the customized etch transfer multilayer stack and further into the dielectric layer. The MLME integration scheme not only decreases the number of overall process steps for the full DD BEOL process but also eliminates several inter-tool wafer exchange sequences as performed in a conventional litho-etch-litho-etch process flow. All MLME process steps were demonstrated i.e. combined 193nm-dry dual-resist layer MLME via- and trench-lithography, full pattern transfer of via- and trench-patterns into the dielectric layer using reactive ion etching (RIE), as well as electroplating and polishing of the DD patterns. This paper provides a detailed description of both post-lithography steps of the DD process for a DD BEOL structure, i.e. (i) the RIE-pattern transfer process with the customized multilayer stack, and (ii) the metallization process completing the DD process for one BEOL layer. Furthermore, the integration capabilities of the MLME technique were demonstrated and characterized by generating an electrically functional via-chain connecting two neighboring BEOL layers fabricated by subsequently applying the MLME approach to both layers. An exhaustive description and evaluation of MLME lithographic patterning is given in an accompanying paper.

Proceedings Article | 26 March 2010 Paper

Advantages of BARC and photoresist matching for 193-nm photosensitive BARC applications

Joyce Lowes, Mark Slezak, Victor Pham, Jim Meador, Ferdinand Rosas, Charlyn Stroud, Ramil-Marcelo Mercado

Proceedings Volume 7639, 76390K (2010) https://doi.org/10.1117/12.846608

KEYWORDS: Picosecond phenomena, Photoresist materials, Photoresist developing, Polymers, Lithography, Diffusion, Semiconducting wafers, Standards development, Chemistry, Quenching (fluorescence)

Read Abstract +

Proceedings Article | 26 March 2010 Paper

Process characterization of pitch-split resist materials for application at 16nm node

Brian Osborn, Steven Holmes, John Arnold, Matthew Colburn, Gary Dabbagh, Cherry Tang, Rex Chen, Sen Liu, Mark Slezak, Rao Varanasi, Nicolette Fender, Yunpeng Yin

Proceedings Volume 7639, 76392X (2010) https://doi.org/10.1117/12.846891

KEYWORDS: Lithography, Photoresist processing, Semiconducting wafers, Double patterning technology, Semiconductors, Photomasks, Reactive ion etching, Silicon, Scanning electron microscopy, Particles

Read Abstract +

Proceedings Article | 26 March 2010 Paper

Fabrication of dual damascene BEOL structures using a multilevel multiple exposure (MLME) scheme, part 1: lithographic patterning

Nicolette Fender, Ronald Della Guardia, Stefan Harrer, Mark Slezak, John Arnold, Matthew Colburn, Sebastian Engelmann, Dario Goldfarb, Steven Holmes, Eric Joseph, Roa Varanasi, Rex Chen, Cherry Tang

Proceedings Volume 7639, 76390I (2010) https://doi.org/10.1117/12.846443

KEYWORDS: Optical lithography, Einsteinium, Back end of line, Etching, Dielectrics, Semiconducting wafers, Lithography, Photoresist materials, Nanoimprint lithography, Reactive ion etching

Read Abstract +