Dr. Scott D. Halle Profile

Dr. Scott D. Halle

at IBM Thomas J. Watson Research Ctr.

SPIE Involvement:

Author

Publications (51)

Proceedings Article | 21 November 2023 Presentation + Paper

EUV mask patterning process to enable opaque SRAFs for bright field EUV mask imaging

Michael Green, Scott Halle, Mohamed Ramadan, Romain Lallement, Henry Kamberian, Martin Burkhardt, Jinju Beineke, Jed Rankin, Chris Progler, Steven McDermott

Proceedings Volume 12751, 127510M (2023) https://doi.org/10.1117/12.2689665

KEYWORDS: SRAF, Extreme ultraviolet, Optical lithography, Resolution enhancement technologies, Opacity, Extreme ultraviolet lithography, Optical proximity correction, Line edge roughness, Semiconducting wafers, Printing

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As extreme ultraviolet lithography (EUVL) technology progresses to support more advanced nodes, mask designs are becoming more complex and difficult for mask makers to produce with the required fidelity. Resolution enhancement techniques (RETs) including mask optical proximity correction (OPC) models and the addition of sub-resolution assist features (SRAFs) are now critical technology enablers. Early adopters of EUVL benefited from the resolution improvement provided by the shorter wavelength. To extend the benefits of EUV to smaller technologies and broader applications, SRAFs are valuable tools to maximize the process window for a variety of critical layers which require both bright and dark field imaging. Regardless of mask tone, because of the short wavelength of EUV radiation, very small SRAFs are required, thus patterning SRAFs for EUVL poses significant mask process challenges. E beam exposure and resist characteristics are key factors for important patterning attributes including minimum resolvable size, line edge roughness (LER), corner rounding (CR), and line end shortening (LES). Patterning dark SRAFs for bright field masks involves an additional challenge of overcoming mechanical forces on these small structures that can cause feature toppling or collapse. In this study, we demonstrate a mask process capable of patterning dark SRAFs on mask at line widths below 25nm (4X). We will discuss patterning solutions including innovations in both the physical mask manufacturing processes as well as mask data preparation techniques, such as mask process correction (MPC). We will utilize advanced characterization techniques to evaluate SRAF pattern fidelity on the mask and its predicted impact on wafer printing performance. A process capable of resolving sufficiently small SRAFs enables an on-wafer analysis to validate whether the predicted lithographic benefits can be demonstrated. Finally, we will review the outlook of continued shrinking mask resolution requirements from both a design value and process implementation perspective. The coming challenges for EUV mask makers include supporting not only ever increasing design complexity, but also the introduction of new mask materials, including phase shift masks (PSMs) as part of the overall RET solution.

SPIE Journal Paper | 8 November 2022 Open Access

Bayesian dropout approximation in deep learning neural networks: analysis of self-aligned quadruple patterning

Scott Halle, Derren Dunn, Allen Gabor, Max Bloomfield, Mark Shephard

JM3, Vol. 21, Issue 04, 041604, (November 2022) https://doi.org/10.1117/12.10.1117/1.JMM.21.4.041604

KEYWORDS: Reactive ion etching, Neural networks, Surface plasmons, Semiconducting wafers, Optical lithography, Data modeling, Stochastic processes, Etching, Data processing, Chaos

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Proceedings Article | 26 May 2022 Paper

Predicting overlay mark performance based on process emulation and optical simulation

Sagarika Mukesh, Jack (Cheuk Wun) Wong, Scott Halle, Allen Gabor

Proceedings Volume 12053, 120531W (2022) https://doi.org/10.1117/12.2613785

KEYWORDS: Overlay metrology, Optical simulations, Calibration, Optical lithography, Optical filters, Metrology, Photomasks, Semiconductors, Semiconducting wafers, Data modeling

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Proceedings Article | 26 May 2022 Presentation + Paper

Focus considerations of design pitches and absorber choice for EUV random logic

Martin Burkhardt, Zheng Chen, Scott Halle, Romain Lallement, Stuart Sieg, Luciana Meli

Proceedings Volume 12051, 120510C (2022) https://doi.org/10.1117/12.2614296

KEYWORDS: Nickel, Photomasks, Extreme ultraviolet, SRAF, Phase shifts, Absorption, Diffraction, Optical lithography, Tantalum

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Proceedings Article | 6 May 2020 Presentation + Paper

Bayesian dropout approximation in deep learning neural networks: analysis of self-aligned quadruple patterning

Scott Halle, Max Bloomfield, Allen Gabor, Derren Dunn, Mark Shephard

Proceedings Volume 11329, 113290B (2020) https://doi.org/10.1117/12.2551649

KEYWORDS: Neural networks, Surface plasmons, Reactive ion etching, Optical lithography, Semiconducting wafers, Data modeling, Metrology, Bayesian inference, Stochastic processes, Etching

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SPIE Journal Paper | 12 October 2016

Methodology for determining critical dimension scanning electron microscope measurement condition of sub-20 nm resist patterns for 0.33 NA extreme ultraviolet lithography

Nobuhiro Okai, Erin Lavigne, Keiichiro Hitomi, Scott Halle, Shoji Hotta, Shunsuke Koshihara, Atsuko Yamaguchi, Junichi Tanaka, Todd Bailey

JM3, Vol. 15, Issue 04, 044001, (October 2016) https://doi.org/10.1117/12.10.1117/1.JMM.15.4.044001

KEYWORDS: Extreme ultraviolet, Scanning electron microscopy, Critical dimension metrology, Electron microscopes, Extreme ultraviolet lithography, Electron beams, Image processing, Double patterning technology, Solids, Precision measurement

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SPIE Journal Paper | 19 July 2016

Improvement of optical proximity-effect correction model accuracy by hybrid optical proximity-effect correction modeling and shrink correction technique for 10-nm node process

Keiichiro Hitomi, Scott Halle, Marshal Miller, Ioana Graur, Nicole Saulnier, Derren Dunn, Nobuhiro Okai, Shoji Hotta, Atuko Yamaguchi, Hitoshi Komuro, Toru Ishimoto, Shunsuke Koshihara, Yutaka Hojo

JM3, Vol. 15, Issue 03, 034002, (July 2016) https://doi.org/10.1117/12.10.1117/1.JMM.15.3.034002

KEYWORDS: Optical proximity correction, Data modeling, Critical dimension metrology, Optical calibration, Scanning electron microscopy, Hybrid optics, Metals, Calibration, Instrument modeling, OLE for process control

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Proceedings Article | 19 March 2016 Paper

EUV mask and wafer defectivity: strategy and evaluation for full die defect inspection

Ravi Bonam, Hung-Yu Tien, Acer Chou, Luciana Meli, Scott Halle, Ivy Wu, Xiaoxia Huang, Chris Lei, Chiyan Kuan, Fei Wang, Daniel Corliss, Wei Fang, Jack Jau, Zhengqing John Qi, Karen Badger, Christina Turley, Jed Rankin

Proceedings Volume 9776, 97761C (2016) https://doi.org/10.1117/12.2219601

KEYWORDS: Photomasks, Semiconducting wafers, Inspection, Extreme ultraviolet, Defect inspection, Wafer inspection, Optical inspection, Wafer-level optics, Nonlinear optics, Optical simulations, Extreme ultraviolet lithography, Defect detection

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Proceedings Article | 8 March 2016 Paper

Assessments of image-based and scatterometry-based overlay targets

Chiew-seng Koay, Nelson Felix, Bassem Hamieh, Scott Halle, Chumeng Zheng, Stuart Sieg

Proceedings Volume 9778, 97781K (2016) https://doi.org/10.1117/12.2220382

KEYWORDS: Overlay metrology, Image segmentation, Scatterometry, Metrology, Semiconducting wafers, Front end of line, Back end of line, Optical lithography, Inspection, Optical filters, Sensors, Reflectivity, Solids

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Proceedings Article | 23 October 2015 Paper

EUV photomask defects: what prints, what doesn't, and what is required for HVM

Jed Rankin, Zhengqing John Qi, Mark Lawliss, Eisuke Narita, Kazunori Seki, Karen Badger, Ravi Bonam, Scott Halle, Christina Turley

Proceedings Volume 9635, 96350L (2015) https://doi.org/10.1117/12.2197476

KEYWORDS: Photomasks, Inspection, Extreme ultraviolet, Manufacturing, Deep ultraviolet, Multilayers, Extreme ultraviolet lithography, Semiconducting wafers, Scanning electron microscopy, EUV optics

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As Extreme Ultraviolet (EUV) lithography has matured, numerous imposing technical challenges have been the focus of intense scrutiny, including the EUV radiation source, reflective optics, and fundamental mask fabrication. There has been a lurking question on the state of mask defectivity that has been almost unanswerable until the recent relative maturation of the rest of the infrastructure. Without readily available actinic blank or patterned inspection systems, EUV blank and mask manufacturers must continue to rely on relatively low resolution optical systems for blank characterization. Despite best efforts, detectable defects still exist; these can be classified into three types: small defects that can be avoided through pattern-shift, medium defects that can be repaired, and large defects which must be suppressed during manufacture. To successfully intercept high-volume-manufacturing (HVM) for the 7nm node, aggressive, continued industry focus is required to ensure that these three defect types are addressed. Without actinic mask inspection, an unknown element with EUV lithography continues to be the presence of nondetected printable defects – defects that print on wafer despite being undetected during mask or blank fabrication. Another risk is that until recently, focus has been on developing techniques to identify catastrophic defects, while past manufacturing experience tells us that much more subtle defects (<10% CD variation) can have significant impact on yield and performance. Using information from many characterization sources, including blank inspections, patterned inspection, atomic-force microscopy (AFM), scanning-electron microscopy (SEM), as well as 36nm and 32nm pitch wafer printing results, we will try to address what the real current state of mask defectivity is. We will discuss techniques to answer the key questions of: “What defects print, what defects do not, and what might our inspections methods be missing?” From this vantage point, we will analyze the current mask defectivity rates and sources, and assess the gap in capability to support full HVM support.

Proceedings Article | 6 April 2015 Paper

Toward defect guard-banding of EUV exposures by full chip optical wafer inspection of EUV mask defect adders

Scott Halle, Luciana Meli, Robert Delancey, Kaushik Vemareddy, Gary Crispo, Ravi Bonam, Martin Burkhardt, Daniel Corliss

Proceedings Volume 9422, 94221D (2015) https://doi.org/10.1117/12.2085958

KEYWORDS: Photomasks, Semiconducting wafers, Inspection, Defect detection, Scanning electron microscopy, Extreme ultraviolet lithography, Defect inspection, Opacity, Extreme ultraviolet, Image classification

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Proceedings Article | 31 March 2015 Paper

Application of SEM-based contours for OPC model weighting and sample plan reduction

Marshal Miller, Keiichiro Hitomi, Scott Halle, Ioana Graur, Todd Bailey

Proceedings Volume 9426, 94260Y (2015) https://doi.org/10.1117/12.2176406

KEYWORDS: Calibration, Data modeling, Cadmium sulfide, Optical proximity correction, Scanning electron microscopy, Statistical modeling, Finite element methods, Semiconducting wafers, Front end of line, Optical lithography

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Proceedings Article | 19 March 2015 Paper

Methodology for determining CD-SEM measurement condition of sub-20nm resist patterns for 0.33NA EUV lithography

Nobuhiro Okai, Erin Lavigne, Keiichiro Hitomi, Scott Halle, Shoji Hotta, Shunsuke Koshihara, Junichi Tanaka, Todd Bailey

Proceedings Volume 9424, 94240H (2015) https://doi.org/10.1117/12.2175841

KEYWORDS: Extreme ultraviolet, Electron beams, Extreme ultraviolet lithography, Scanning electron microscopy, Precision measurement, Metrology, Image processing, Optical testing, Error analysis, Electron microscopes

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Proceedings Article | 17 April 2014 Paper

E-beam inspection of EUV mask defects: To etch or not to etch?

Ravi Bonam, Hung-Yu Tien, Chanro Park, Scott Halle, Fei Wang, Daniel Corliss, Wei Fang, Jack Jau

Proceedings Volume 9048, 904812 (2014) https://doi.org/10.1117/12.2048284

KEYWORDS: Inspection, Etching, Extreme ultraviolet, Photomasks, Defect detection, Semiconducting wafers, Silicon, Defect inspection, Extreme ultraviolet lithography, Reactive ion etching

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Proceedings Article | 2 April 2014 Paper

Precise CD-SEM metrology of resist patterns at around 20 nm for 0.33NA EUV lithography

Nobuhiro Okai, Erin Lavigne, Keiichiro Hitomi, Scott Halle, Shoji Hotta, Shunsuke Koshihara, Karen Petrillo, Atsuko Yamaguchi, Junichi Tanaka, Todd Bailey

Proceedings Volume 9050, 90501X (2014) https://doi.org/10.1117/12.2045375

KEYWORDS: Semiconducting wafers, Extreme ultraviolet, Electron beams, Extreme ultraviolet lithography, Photoresist processing, Critical dimension metrology, Metrology, Precision measurement, Photomasks, Image processing

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Proceedings Article | 31 March 2014 Paper

Hybrid OPC modeling with SEM contour technique for 10nm node process

Keiichiro Hitomi, Scott Halle, Marshal Miller, Ioana Graur, Nicole Saulnier, Derren Dunn, Nobuhiro Okai, Shoji Hotta, Atsuko Yamaguchi, Hitoshi Komuro, Toru Ishimoto, Shunsuke Koshihara, Yutaka Hojo

Proceedings Volume 9052, 90520W (2014) https://doi.org/10.1117/12.2047678

KEYWORDS: Optical proximity correction, Data modeling, Scanning electron microscopy, Critical dimension metrology, Metals, Instrument modeling, Calibration, Metrology, Logic devices, OLE for process control

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SPIE Journal Paper | 11 December 2012

Dose-focus monitor technique using a critical-dimension scanning electron microscope and its application to local variation analysis

Shoji Hotta, Timothy Brunner, Scott Halle, Keiichiro Hitomi, Takeshi Kato, Atsuko Yamaguchi

JM3, Vol. 11, Issue 4, 043011, (December 2012) https://doi.org/10.1117/12.10.1117/1.JMM.11.4.043011

KEYWORDS: Scanning electron microscopy, Semiconducting wafers, Photoresist processing, Scatterometry, Electron microscopes, Metrology, Photomasks, Critical dimension metrology, Detection and tracking algorithms, Algorithm development

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Proceedings Article | 14 March 2012 Paper

Insertion strategy for EUV lithography

Obert Wood, John Arnold, Timothy Brunner, Martin Burkhardt, James H.-C. Chen, Deniz Civay, Susan S.-C. Fan, Emily Gallagher, Scott Halle, Ming He, Craig Higgins, Hirokazu Kato, Jongwook Kye, Chiew-Seng Koay, Guillaume Landie, Pak Leung, Gregory McIntyre, Satoshi Nagai, Karen Petrillo, Sudhar Raghunathan, Ralph Schlief, Lei Sun, Alfred Wagner, Tom Wallow, Yunpeng Yin, Xuelian Zhu, Matthew Colburn, Daniel Corliss, Cecilia Smolinski

Proceedings Volume 8322, 832203 (2012) https://doi.org/10.1117/12.916292

KEYWORDS: Extreme ultraviolet lithography, Extreme ultraviolet, Photomasks, Manufacturing, Lithography, Immersion lithography, Optical lithography, Metals, Semiconducting wafers, Overlay metrology

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Proceedings Article | 10 March 2012 Paper

Dose-focus monitor technique using CD-SEM and application to local variation analysis

Shoji Hotta, Timothy Brunner, Scott Halle, Keiichiro Hitomi, Takeshi Kato, Atsuko Yamaguchi

Proceedings Volume 8324, 832405 (2012) https://doi.org/10.1117/12.916413

KEYWORDS: Semiconducting wafers, Scatterometry, Metrology, Critical dimension metrology, Photomasks, Detection and tracking algorithms, Photoresist processing, Algorithm development, Process control, Lithography

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Proceedings Article | 22 February 2012 Paper

Lens heating challenges for negative tone develop layers with freeform illumination: a comparative study of experimental vs. simulated results

Scott Halle, Michael Crouse, Aiqin Jiang, Youri van Dommelen, Tim Brunner, Blandine Minghetti, Matt Colburn, Youping Zhang

Proceedings Volume 8326, 832607 (2012) https://doi.org/10.1117/12.916312

KEYWORDS: Reticles, Semiconducting wafers, Source mask optimization, Monochromatic aberrations, Lithography, Calibration, Photomasks, Critical dimension metrology, Device simulation, Overlay metrology

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Proceedings Article | 20 April 2011 Paper

Overlay improvement roadmap: strategies for scanner control and product disposition for 5-nm overlay

Nelson Felix, Allen Gabor, Vinayan Menon, Peter Longo, Scott Halle, Chiew-seng Koay, Matthew Colburn

Proceedings Volume 7971, 79711D (2011) https://doi.org/10.1117/12.879532

KEYWORDS: Overlay metrology, Scanners, Semiconducting wafers, Reticles, Metrology, Optical alignment, Control systems, Photomasks, Image processing, Error analysis

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To keep pace with the overall dimensional shrink in the industry, overlay capability must also shrink proportionally. Unsurprisingly, overlay capability < 10 nm is already required for currently nodes in development, and the need for multi-patterned levels has accelerated the overlay roadmap requirements to the order of 5 nm. To achieve this, many improvements need to be implemented in all aspects of overlay measurement, control, and disposition. Given this difficult task, even improvements involving fractions of a nanometer need to be considered. These contributors can be divided into 5 categories: scanner, process, reticle, metrology, and APC. In terms of overlay metrology, the purpose is two-fold: To measure what the actual overlay error is on wafer, and to provide appropriate APC feedback to reduce overlay error for future incoming hardware. We show that with optimized field selection plan, as well as appropriate within-field sampling, both objectives can be met. For metrology field selection, an optimization algorithm has been employed to proportionately sample fields of different scan direction, as well as proportional spatial placement. In addition, intrafield sampling has been chosen to accurately represent overlay inside each field, rather than just at field corners. Regardless, the industry-wide use of multi-exposure patterning schemes has pushed scanner overlay capabilities to their limits. However, it is now clear that scanner contributions may no longer be the majority component in total overlay performance. The ability to control correctable overlay components is paramount to achieving desired performance. In addition, process (non-scanner) contributions to on-product overlay error need to be aggressively tackled, though we show that there also opportunities available in active scanner alignment schemes, where appropriate scanner alignment metrology and correction can reduce residuals on product. In tandem, all these elements need to be in place to achieve the necessary overlay roadmap capability for current development efforts.

Proceedings Article | 16 April 2011 Paper

Optimization of pitch-split double patterning photoresist for applications at the 16nm node

Steven Holmes, Cherry Tang, Sean Burns, Yunpeng Yin, Rex Chen, Chiew-seng Koay, Sumanth Kini, Hideyuki Tomizawa, Shyng-Tsong Chen, Nicolette Fender, Brian Osborn, Lovejeet Singh, Karen Petrillo, Guillaume Landie, Scott Halle, Sen Liu, John Arnold, Terry Spooner, Rao Varanasi, Mark Slezak, Matthew Colburn

Proceedings Volume 7972, 79720G (2011) https://doi.org/10.1117/12.881489

KEYWORDS: Photoresist processing, Reactive ion etching, Lithography, Photomasks, Dielectrics, Etching, Scanning electron microscopy, Double patterning technology, Semiconductors, Optical lithography

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SPIE Journal Paper | 1 April 2011

Critical dimension scanning electron microscope local overlay measurement and its application for double patterning of complex shapes

Shoji Hotta, Takumichi Sutani, Scott Halle, Daniel Moore, Chas Archie, Akiyuki Sugiyama, Masahiko Ikeno, Atsuko Yamaguchi, Kazuyoshi Torii

JM3, Vol. 10, Issue 02, 023014, (April 2011) https://doi.org/10.1117/12.10.1117/1.3599867

KEYWORDS: Overlay metrology, Scanning electron microscopy, Double patterning technology, Electron microscopes, Data modeling, Semiconducting wafers, Optical lithography, Lithography, Error analysis, Wafer-level optics

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Proceedings Article | 23 March 2011 Paper

Towards manufacturing of advanced logic devices by double-patterning

Chiew-seng Koay, Scott Halle, Steven Holmes, Karen Petrillo, Matthew Colburn, Youri van Dommelen, Aiqin Jiang, Michael Crouse, Shannon Dunn, David Hetzer, Shinichiro Kawakami, Jason Cantone, Lior Huli, Martin Rodgers, Brian Martinick

Proceedings Volume 7973, 79730F (2011) https://doi.org/10.1117/12.879618

KEYWORDS: Semiconducting wafers, Overlay metrology, Optical alignment, Silicon, Scanners, Scanning electron microscopy, Critical dimension metrology, Data modeling, Manufacturing, Double patterning technology

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Proceedings Article | 14 March 2011 Paper

Qualification, monitoring, and integration into a production environment of the world's first fully programmable illuminator

Gregory McIntyre, Daniel Corliss, Remco Groenendijk, Rene Carpaij, Ton van Niftrik, Guillaume Landie, Takao Tamura, Thomas Pepin, James Waddell, Jerry Woods, Chris Robinson, Kehan Tian, Richard Johnson, Scott Halle, Ryoung-Han Kim, Erin Mclellan, Hirokazu Kato, Anthony Scaduto, Carl Maier, Matt Colburn

Proceedings Volume 7973, 797306 (2011) https://doi.org/10.1117/12.879483

KEYWORDS: Mirrors, Diffractive optical elements, Fiber optic illuminators, Scanners, Optical proximity correction, Lithography, Nanotechnology, Manufacturing, Glasses, Environmental monitoring

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Proceedings Article | 25 September 2010 Paper

Understanding the trade-offs of thinner binary mask absorbers

Jaione Tirapu-Azpiroz, Gregory McIntyre, Tom Faure, Scott Halle, Michael Hibbs, Alfred Wagner, Kafai Lai, Emily Gallagher, Timothy Brunner

Proceedings Volume 7823, 78230M (2010) https://doi.org/10.1117/12.865358

KEYWORDS: Photomasks, Semiconducting wafers, Reflectivity, Pellicles, Diffraction, Binary data, Stray light, Opacity, Polarization, Manufacturing

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Mask topography is only one of the challenges for extending 193nm immersion lithography to 22nm and beyond. Migration to binary but thinner mask absorbers, from the previously employed attenuated phase-shift mask (attnPSM) technology, traded a tolerable loss in contrast for better mask making performance and reduced electromagnetic field (EMF) impact [1]. The relentless technological advances in 193nm lithography required to enable 22nm technology, however, continue to drive the dimensions of mask features deep into sub-wavelength scale. In this regime, residual mask EMF effects can still degrade the imaging performance of critical mask patterns, often in the form of featuredependent biasing and shifts of the plane of best focus that shrink the common process window and magnify the impact of mask errors. In this paper we investigate the potential benefits in EMF effects mitigation provided by further thinning the mask absorber to the minimum possible while retaining the required opacity. This study was motivated by the narrower process variability bands observed on a 22nm structure with high EMF sensitivity, when computed with rigorous EMF simulations using a thinner absorber. Resist measurements on wafers exposed with the same EMF sensitive structure built on either the standard binary mask or the thinner sample, confirmed the lower sensitivity to mask topography of the latter while also providing a significant process window improvement. We further observed that thinner topography allowed for a smaller topography induced bias, resulting in improved mask manufacturability with less risk for mask corrections to be limited by mask manufacturability rules such as small assist features and small corner to corner gaps. Thinning the absorber, however, is typically accompanied by an increase in reflectivity of the mask blank which may influence the nature of stray light in the imaging system. To understand the consequences of increasing the blank reflectivity, a double expose scheme was used to measure stray light and determine the relative contribution from the imaging system optics, the mask blank reflectivity, and pellicle thickness. Initial results show that the increased reflectivity of the thinner absorber film has minimal impact on stray light effects in the scanner and that the overall mask reflectivity at high angles is typically dominated by the pellicle thickness. The thin binary absorber should be used in conjunction with a thin pellicle. In this paper we will also explore other relevant characteristics of these novel mask blanks, such as diffraction efficiency, EMF-induced focus drift, changes in contrast, and the implications for increased reflectivity, smaller assist feature size and other lithographic considerations. These results will be demonstrated with rigorous electromagnetic simulations as well as AIMS and wafer measurements on a set of EMF sensitive structures for 22nm contact and metal layers, while simultaneously verifying that the imaging performance of the remaining patterns is unaffected. The use of thinner absorber film also improves the mask making process, contributing to better mask critical dimension (CD) uniformity and overall better lithographic performance as discussed in [2].

Proceedings Article | 2 April 2010 Paper

Concerning the influence of pattern symmetry on CD-SEM local overlay measurements for double patterning of complex shapes

Shoji Hotta, Takumichi Sutani, Akiyuki Sugiyama, Masahiko Ikeno, Atsuko Yamaguchi, Kazuyoshi Torii, Scott Halle, Daniel Moore, Chas Archie

Proceedings Volume 7638, 76381T (2010) https://doi.org/10.1117/12.846674

KEYWORDS: Overlay metrology, Double patterning technology, Scanning electron microscopy, Semiconducting wafers, Optical lithography, Control systems, Metrology, Lithography, Algorithm development, Detection and tracking algorithms

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Proceedings Article | 2 April 2010 Paper

Spatial signature in local overlay measurements: what CD-SEM can tell us and optical measurements can not

Scott Halle, Daniel Moore, Chas Archie, Shoji Hotta, Takumichi Sutani, Akiyuki Sugiyama, Masahiko Ikeno, Atsuko Yamaguchi, Kazuyoshi Torii

Proceedings Volume 7638, 76381V (2010) https://doi.org/10.1117/12.846665

KEYWORDS: Overlay metrology, Double patterning technology, Scanning electron microscopy, Data modeling, Wafer-level optics, Optical testing, Lithography, Semiconducting wafers, Metrology, Visualization

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Proceedings Article | 16 March 2010 Paper

Demonstrating the benefits of source-mask optimization and enabling technologies through experiment and simulations

David Melville, Alan Rosenbluth, Kehan Tian, Kafai Lai, Saeed Bagheri, Jaione Tirapu-Azpiroz, Jason Meiring, Scott Halle, Greg McIntyre, Tom Faure, Daniel Corliss, Azalia Krasnoperova, Lei Zhuang, Phil Strenski, Andreas Waechter, Laszlo Ladanyi, Francisco Barahona, Daniele Scarpazza, Jon Lee, Tadanobu Inoue, Masaharu Sakamoto, Hidemasa Muta, Alfred Wagner, Geoffrey Burr, Young Kim, Emily Gallagher, Mike Hibbs, Alexander Tritchkov, Yuri Granik, Moutaz Fakhry, Kostas Adam, Gabriel Berger, Michael Lam, Aasutosh Dave, Nick Cobb

Proceedings Volume 7640, 764006 (2010) https://doi.org/10.1117/12.846716

KEYWORDS: Source mask optimization, Photomasks, Metals, Lithography, Optical proximity correction, Line edge roughness, Resolution enhancement technologies, Diffractive optical elements, Semiconducting wafers, Scanning electron microscopy

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SPIE Journal Paper | 1 January 2010

Lithographic qualification of new opaque MoSi binary mask blank for the 32-nm node and beyond

Gregory McIntyre, Michael Hibbs, Jaione Tirapu-Azpiroz, Geng Han, Scott Halle, Thomas Faure, Ryan Deschner, Bradley Morgenfeld, Sridhar Ramaswamy, Alfred Wagner

JM3, Vol. 9, Issue 01, 013010, (January 2010) https://doi.org/10.1117/12.10.1117/1.3295712

KEYWORDS: Photomasks, Binary data, Optical proximity correction, Lithography, Opacity, Semiconducting wafers, Data modeling, Electromagnetism, Calibration, Phase shifting

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SPIE Journal Paper | 1 January 2010

22-nm-node technology active-layer patterning for planar transistor devices

Ryoung-Han Kim, Steven Holmes, Scott Halle, Vito Dai, Jason Meiring, Aasutosh Dave, Matthew Colburn, Harry Levinson

JM3, Vol. 9, Issue 01, 013001, (January 2010) https://doi.org/10.1117/12.10.1117/1.3302125

KEYWORDS: Resolution enhancement technologies, Lithography, Printing, Optical lithography, Image processing, Optical proximity correction, Polarization, Transistors, Line edge roughness, Photoresist processing

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Proceedings Article | 23 September 2009 Paper

SMO photomask inspection in the lithographic plane

Emily Gallagher, Karen Badger, Yutaka Kodera, Jaione Tirapu Azpiroz, Ioana Graur, Scott Halle, Kafai Lai, Gregory McIntyre, Mark Wihl, Shaoyun Chen, Ge Cong, Bo Mu, Zhian Guo, Aditya Dayal

Proceedings Volume 7488, 748807 (2009) https://doi.org/10.1117/12.830668

KEYWORDS: Photomasks, Inspection, Source mask optimization, Semiconducting wafers, Lithography, Manufacturing, Binary data, Reticles, Image processing, Image resolution

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Proceedings Article | 16 March 2009 Paper

22 nm technology node active layer patterning for planar transistor devices

Ryoung-Han Kim, Steven Holmes, Scott Halle, Vito Dai, Jason Meiring, Aasutosh Dave, Matthew Colburn, Harry Levinson

Proceedings Volume 7274, 72742X (2009) https://doi.org/10.1117/12.814277

KEYWORDS: Resolution enhancement technologies, Lithography, Optical lithography, Image processing, Transistors, Printing, Optical proximity correction, Photoresist processing, Design for manufacturing, Process control

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Proceedings Article | 16 March 2009 Paper

Overcoming the challenges of 22-nm node patterning through litho-design co-optimization

Martin Burkhardt, J. C. Arnold, Z. Baum, S. Burns, J. Chang, J. Chen, J. Cho, V. Dai, Y. Deng, S. Halle, G. Han, S. Holmes, D. Horak, S. Kanakasabapathy, R. H. Kim, A. Klatchko, C. S. Koay, A. Krasnoperova, Y. Ma, E. McLellan, K. Petrillo, S. Schmitz, C. Tabery, Y. Yin, L. Zhuang, Y. Zou, J. Kye, V. Paruchuri, S. Mansfield, C. Spence, M. Colburn

Proceedings Volume 7274, 727404 (2009) https://doi.org/10.1117/12.814433

KEYWORDS: Etching, Lithography, Printing, Optical lithography, Double patterning technology, Resolution enhancement technologies, Logic, Metals, Photomasks, Tolerancing

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Proceedings Article | 16 March 2009 Paper

Experimental result and simulation analysis for the use of pixelated illumination from source mask optimization for 22nm logic lithography process

Kafai Lai, Alan Rosenbluth, Saeed Bagheri, John Hoffnagle, Kehan Tian, David Melville, Jaione Tirapu-Azpiroz, Moutaz Fakhry, Young Kim, Scott Halle, Greg McIntyre, Alfred Wagner, Geoffrey Burr, Martin Burkhardt, Daniel Corliss, Emily Gallagher, Tom Faure, Michael Hibbs, Donis Flagello, Joerg Zimmermann, Bernhard Kneer, Frank Rohmund, Frank Hartung, Christoph Hennerkes, Manfred Maul, Robert Kazinczi, Andre Engelen, Rene Carpaij, Remco Groenendijk, Joost Hageman, Carsten Russ

Proceedings Volume 7274, 72740A (2009) https://doi.org/10.1117/12.814680

KEYWORDS: Photomasks, Source mask optimization, Diffractive optical elements, Manufacturing, Lithographic illumination, Lithography, Semiconducting wafers, Photovoltaics, Polarization, Printing

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SPIE Journal Paper | 1 January 2009

Combinatorial overlay control for double patterning

Christopher Ausschnitt, Scott Halle

JM3, Vol. 8, Issue 01, 011008, (January 2009) https://doi.org/10.1117/12.10.1117/1.3023079

KEYWORDS: Overlay metrology, Double patterning technology, Tolerancing, Optical alignment, Semiconducting wafers, Optical lithography, Metrology, Control systems, Photomasks, Image processing

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Proceedings Article | 1 April 2008 Paper

32 nm logic patterning options with immersion lithography

K. Lai, S. Burns, S. Halle, L. Zhuang, M. Colburn, S. Allen, C. Babcock, Z. Baum, M. Burkhardt, V. Dai, D. Dunn, E. Geiss, H. Haffner, G. Han, P. Lawson, S. Mansfield, J. Meiring, B. Morgenfeld, C. Tabery, Y. Zou, C. Sarma, L. Tsou, W. Yan, H. Zhuang, D. Gil, D. Medeiros

Proceedings Volume 6924, 69243C (2008) https://doi.org/10.1117/12.784107

KEYWORDS: Photomasks, Double patterning technology, Logic, Lithography, Etching, Optical lithography, Optical proximity correction, Immersion lithography, Printing, Image processing

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The semiconductor industry faces a lithographic scaling limit as the industry completes the transition to 1.35 NA immersion lithography. Both high-index immersion lithography and EUV lithography are facing technical challenges and commercial timing issues. Consequently, the industry has focused on enabling double patterning technology (DPT) as a means to circumvent the limitations of Rayleigh scaling. Here, the IBM development alliance demonstrate a series of double patterning solutions that enable scaling of logic constructs by decoupling the pattern spatially through mask design or temporally through innovative processes. These techniques have been successfully employed for early 32nm node development using 45nm generation tooling. Four different double patterning techniques were implemented. The first process illustrates local RET optimization through the use of a split reticle design. In this approach, a layout is decomposed into a series of regions with similar imaging properties and the illumination conditions for each are independently optimized. These regions are then printed separately into the same resist film in a multiple exposure process. The result is a singly developed pattern that could not be printed with a single illumination-mask combination. The second approach addresses 2D imaging with particular focus on both line-end dimension and linewidth control [1]. A double exposure-double etch (DE2) approach is used in conjunction with a pitch-filling sacrificial feature strategy. The third double exposure process, optimized for via patterns also utilizes DE2. In this method, a design is split between two separate masks such that the minimum pitch between any two vias is larger than the minimum metal pitch. This allows for final structures with vias at pitches beyond the capability of a single exposure. In the fourth method,, dark field double dipole lithography (DDL) has been successfully applied to BEOL metal structures and has been shown to be overlay tolerant [6]. Collectively, the double patterning solutions developed for early learning activities at 32nm can be extended to 22nm applications.

Proceedings Article | 7 March 2008 Paper

Double exposure double etch for dense SRAM: a designer's dream

Chandra Sarma, Allen Gabor, Scott Halle, Henning Haffner, Klaus Herold, Len Tsou, Helen Wang, Haoren Zhuang

Proceedings Volume 6924, 692429 (2008) https://doi.org/10.1117/12.772985

KEYWORDS: Etching, Optical lithography, Double patterning technology, Tolerancing, Image processing, Photomasks, Lithography, Logic devices, Semiconducting wafers, Oxides

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Proceedings Article | 30 October 2007 Paper

Paving the way to a full chip gate level double patterning application

Henning Haffner, Jason Meiring, Zachary Baum, Scott Halle

Proceedings Volume 6730, 67302C (2007) https://doi.org/10.1117/12.746116

KEYWORDS: Double patterning technology, Photomasks, SRAF, Critical dimension metrology, Optical lithography, Tolerancing, Optical proximity correction, Etching, Printing, Lithography

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Double patterning lithography processes can offer significant yield enhancement for challenging circuit designs. Many decomposition (i.e. the process of dividing the layout design into first and second exposures) techniques are possible, but the focus of this paper is on the use of a secondary "cut" mask to trim away extraneous features left from the first exposure. This approach has the advantage that each exposure only needs to support a subset of critical features (e.g. dense lines with the first exposure, isolated spaces with the second one). The extraneous features ("printing assist features" or PrAFs) are designed to support the process window of critical features much like the role of the subresolution assist features (SRAFs) in conventional processes. However, the printing nature of PrAFs leads to many more design options, and hence a greater process and decomposition parameter exploration space, than are available for SRAFs. A decomposition scheme using PRAFs was developed for a gate level process. A critical driver of the work was to deliver improved across-chip linewidth variation (ACLV) performance versus an optimized single exposure process while providing support for a larger range of critical features. A variety of PRAF techniques were investigated by simulation, with a PrAF scheme similar to standard SRAF rules being chosen as the optimal solution [1]. This paper discusses aspects of the code development for an automated PrAF generation and placement scheme and the subsequent decomposition of a layout into two mask levels. While PrAF placement and decomposition is straightforward for layouts with pitch and orientation restrictions, it becomes rather complex for unrestricted layout styles. Because this higher complexity yields more irregularly shaped PrAFs, mask making becomes another critical driver of the optimum placement and clean-up strategies. Examples are given of how those challenges are met or can be successfully circumvented. During subsequent decomposition of the PrAF-enhanced layout into two independent mask levels, various geometric decomposition parameters have to be considered. As an example, the removal of PrAFs has to be guaranteed by a minimum required overlap of the cut mask opening past any PrAF edge. It is discussed that process assumptions such as CD tolerances and overlay as well as inter-level relationship ground rules need to be considered to successfully optimize the final decomposition scheme. Furthermore, simulation and experimental results regarding not only ACLV but also across-device linewidth variation (ADLV) are analyzed.

Proceedings Article | 26 March 2007 Paper

ACLV driven double-patterning decomposition with extensively added printing assist features (PrAFs)

Jason Meiring, Henning Haffner, Carlos Fonseca, Scott Halle, Scott Mansfield

Proceedings Volume 6520, 65201U (2007) https://doi.org/10.1117/12.712558

KEYWORDS: SRAF, Printing, Photomasks, Etching, Lithography, Optical lithography, Optical proximity correction, Critical dimension metrology, Double patterning technology, 3D modeling

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Proceedings Article | 20 October 2006 Paper

Mastering double exposure process window aware OPC by means of virtual targets

Henning Haffner, Zachary Baum, Carlos Fonseca, Scott Halle, Lars Liebmann, Arpan Mahorowala

Proceedings Volume 6349, 63491W (2006) https://doi.org/10.1117/12.687609

KEYWORDS: Optical proximity correction, Photomasks, Model-based design, Logic, Process modeling, SRAF, Critical dimension metrology, Photoresist processing, Tolerancing, Image processing

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Proceedings Article | 14 March 2006 Paper

Meeting critical gate linewidth control needs at the 65 nm node

Arpan Mahorowala, Scott Halle, Allen Gabor, William Chu, Alexandra Barberet, Donald Samuels, Amr Abdo, Len Tsou, Wendy Yan, Seiji Iseda, Kaushal Patel, Bachir Dirahoui, Asuka Nomura, Ishtiaq Ahsan, Faisal Azam, Gary Berg, Andrew Brendler, Jeffrey Zimmerman, Tom Faure

Proceedings Volume 6156, 61560M (2006) https://doi.org/10.1117/12.659427

KEYWORDS: Critical dimension metrology, Etching, Semiconducting wafers, Photomasks, Optical proximity correction, Lithography, Cadmium, Reticles, Control systems, Immersion lithography

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Proceedings Article | 5 May 2005 Paper

Process-window sensitive full-chip inspection for design-to-silicon optimization in the sub-wavelength era

Mary Jane Brodsky, Scott Halle, Vickie Jophlin-Gut, Lars Liebmann, Don Samuels, Gary Crispo, Kourosh Nafisi, Vijay Ramani, Ingrid Peterson

Proceedings Volume 5756, (2005) https://doi.org/10.1117/12.599865

KEYWORDS: Reticles, Inspection, Modulation, Resolution enhancement technologies, Optical proximity correction, Photomasks, Semiconducting wafers, Lithography, Manufacturing, Optical lithography

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Proceedings Article | 4 May 2005 Paper

Topography impacts on line-width control for gate level lithography

Allen Gabor, Scott Halle, Chidam Kallingal

Proceedings Volume 5753, (2005) https://doi.org/10.1117/12.600697

KEYWORDS: Semiconducting wafers, Reflectivity, Neodymium, Silicon, Lithography, Control systems, Critical dimension metrology, Oxides, Photoresist processing, Chemical mechanical planarization

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Proceedings Article | 28 May 2004 Paper

Effect of the effective resist diffusion length to the photolithography at 65- and 45-nm nodes: a study with simple and accurate analytical equations

Qiang Wu, Scott Halle, Zengqin Zhao

Proceedings Volume 5377, (2004) https://doi.org/10.1117/12.544255

KEYWORDS: Diffusion, Photomasks, Optical lithography, Semiconducting wafers, Lithography, Phase shifting, Critical dimension metrology, Image processing, Photoresist processing, Diffraction

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As the current photolithography moves toward the 65 and 45 nm nodes, resist blur, which is now around 50 to 90 nm full width at half maximum (FWHM), starts to limit the printability of narrow pitches by lowering image contrast, increasing mask error factor (MEF), and changing critical dimension (CD) through pitch behavior. Since such resist blur is known to originate from acid and base diffusion, which is an important process for chemical amplification, the reduction of such blur may affect the resist performance. Therefore, knowing how much diffusion can be tolerated at any given lithographic condition is critical to the success of photolithography at the 65 and 45 nm nodes. In this paper, we present a systematic study of the effect of the resist diffusion with a series of simple and accurate analytic equations and experimental data for the 193 nm lithography. We also extend our predictions to the 193 nm immersion lithography. We first show a simple way to accurately measure the effective resist diffusion length through the regular wafer exposure method for many typical resists. We then show a method to accurately quantify the contrast reduction due to such resist diffusion for both alternating phase shifting masks (Alt-PSM) and attenuated phase shifting masks (Att-PSM). We conclude that the contrast reduction is very significant with typical 193 nm resists, which have diffusion lengths of around 30 to 40 nm. In the study, we found that the mask error factor (MEF), though dependent on the illumination condition, is a strong function of the resist diffusion length at any given illumination condition. For example, in the alt-PSM case, the MEF is almost entirely determined by the resist diffusion. In the att-PSM case, however, the MEF is only partially dependent on the resist diffusion length, about 50%. In fact, a short diffusion length of less than 20 nm will be required to extend its litho-worthiness to the 45 nm node with contrast levels comparable to the current ones. Plots of the contrast and MEF through pitch for both alt-PSM and att-PSM for various diffusion lengths under typical lithographic conditions will be presented. Experimental verification of the above analytical equations will be presented.

Proceedings Article | 3 May 2004 Paper

High-performance circuit design for the RET-enabled 65-nm technology node

Lars Liebmann, Arnold Barish, Zachary Baum, Henry Bonges, Scott Bukofsky, Carlos Fonseca, Scott Halle, Gregory Northrop, Steven Runyon, Leon Sigal

Proceedings Volume 5379, (2004) https://doi.org/10.1117/12.538242

KEYWORDS: Resolution enhancement technologies, Manufacturing, Lithography, Photomasks, Optical proximity correction, Product engineering, Control systems, Semiconductors, Optical lithography, Electronic design automation

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Proceedings Article | 26 June 2003 Paper

Scaling rules of phase error control for the manufacturing of alternating phase-shifting masks for 193-nm photolithography and beyond

Qiang Wu, Scott Halle, Scott Bukofsky, Shahid Butt, Michael Hibbs

Proceedings Volume 5040, (2003) https://doi.org/10.1117/12.485504

KEYWORDS: Photomasks, Critical dimension metrology, Diffraction, Lithography, Error control coding, Phase shifting, Control systems, Tolerancing, Optical lithography, Phase shifts

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The use of alternating phase shifting masks (alt-PSM) can significantly improve lithographic process windows. However, the existence of phase error between the nominal 0 and 180 degree phase regions can cause printed lines to shift laterally toward each other in pairs at image planes away from the best focus. Such asymmetry, especially evident with small ground rules, challenges both overlay and critical dimension (CD) control. To minimize such effect, tight control in phase angle has been implemented, which contributes to the higher fabrication cost for an alt-PSM. Since the effect of the phase error varies with different lithographic conditions, knowing how much phase control is necessary for a given lithographic situation becomes essential to the reduction of the mask fabrication cost. Although this phenomenon has been studied in the past with a number of simulations and experiments, a systematic understanding of its mechanism, especially its interaction with CD and numerical aperture has not been reported. This paper explores the theoretical relationship between phase error and important parameters of photolithographic processes, such as CD, numerical apertures (NA), and overlay tolerance. A simple equation of the phase error is developed, which indicates that the effect of the phase error is inversely proportional to both phase error and defocus. We have compared the predictions of this theory to our first experimental results from a test mask and a good agreement is found. Based on this theory, we develop the quantity “tolerable phase error” relating the effect of the phase error to the CD, pitch, and depth of focus of the imaging system. We have found that for a system with depth of focus of +/- 300 nm, a phase error control about 2 degrees is necessary to realize a line shift control of less than 2.5% of the CD for the most aggressive feature size at any NA. We also note that the control of phase error can be relaxed at high NA. Calculations for 193 nm as well as 157 nm lithography are presented.

Proceedings Article | 12 June 2003 Paper

Hardmask technology for sub-100-nm lithographic imaging

Katherina Babich, Arpan Mahorowala, David Medeiros, Dirk Pfeiffer, Karen Petrillo, Marie Angelopoulos, Alfred Grill, Vishnubhai Patel, Scott Halle, Timothy Brunner, Richard Conti, Scott Allen, Richard Wise

Proceedings Volume 5039, (2003) https://doi.org/10.1117/12.485174

KEYWORDS: Etching, Silicon, Reflectivity, Lithography, Plasma, Interfaces, Photoresist processing, Electron beam lithography, Plasma enhanced chemical vapor deposition, Image resolution

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Proceedings Article | 12 June 2003 Paper

Highly etch-selective spin-on bottom antireflective coating for use in 193-nm lithography and beyond

Dirk Pfeiffer, Arpan Mahorowala, Katherina Babich, David Medeiros, Karen Petrillo, Marie Angelopoulos, Wu-Song Huang, Scott Halle, Colin Brodsky, Scott Allen, Steven Holmes, Ranee Kwong, Robert Lang, Phillip Brock

Proceedings Volume 5039, (2003) https://doi.org/10.1117/12.485178

KEYWORDS: Silicon, Etching, Lithography, Polymers, Oxides, Photoresist processing, Reflectivity, Silicon films, 193nm lithography, Bottom antireflective coatings

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Proceedings Article | 14 September 2001 Paper

When is bilayer thin-film imaging suitable: comparison with single-layer resists

Scott Halle, Alan Thomas, Michael Armacost, Timothy Dalton, Xiaochun Chen, Scott Bukofsky, Oliver Genz, Zhijian Lu, Shahid Butt, Zheng Chen, Richard Ferguson, Eric Coker, Robert Leidy, Qinghuang Lin, Arpan Mahorowala, Katherina Babich, Karen Petrillo, Marie Angelopoulos, Mark Ignatowicz, Bang Bui

Proceedings Volume 4346, (2001) https://doi.org/10.1117/12.435797

KEYWORDS: Etching, Photomasks, Dielectrics, Lithography, Oxides, Thin films, Silicon, Reactive ion etching, Photoresist processing, Scanning electron microscopy

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Proceedings Article | 20 August 2001 Paper

Tunable antireflective coatings with built-in hard mask properties facilitating thin-resist processing

Arpan Mahorowala, Katherina Babich, Karen Petrillo, John Simons, Marie Angelopoulos, Vishnubhai Patel, Alfred Grill, Scott Halle, Richard Conti, ChungHsi Wu, Richard Wise, Linda Chen, Alan Thomas, B. Lee, Oliver Genz

Proceedings Volume 4343, (2001) https://doi.org/10.1117/12.436710

KEYWORDS: Photomasks, Etching, Silicon, Reflectivity, Electron beam lithography, Interfaces, Lithography, Oxides, Antireflective coatings, Dielectrics

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Patterning sub-150 nm features in dielectric stacks using single layer resist processes in conjunction with organic anti-reflective coatings (ARCs) is becoming very difficult. Typical organic ARC-open etch processes suffer from poor ARC-to-resist selectivities (~0.7), and are accompanied by critical dimension (CD) losses. The resist remaining is often not sufficient to prevent artifacts such as substrate microrevicing during subsequent etches. PECVD-Deposited titanium nitride and silicon oxynitride films have been investigated as ARC layers but their basic nature has caused residue formation at the resist/ARC interface. We have developed a PECVD-deposited material, TERA (Tunable Etch-Resistant ARC) that acts as an ARC at 248 nm and 193 nm wavelengths and provides excellent etch selectivity to resist surpassing those attained with organic ARCs. In addition, this material demonstrates excellent hard mask properties for subsequent dielectric etch steps. The optical properties of these films can be easily tuned to minimize substrate reflectance at either imaging wavelength by controlling the precursor composition and deposition conditions. The films are compatible with 248 nm and 193 nm resists - no footing, undercut or residue is observed during patterning. The films can be etched selectively to resist (selectivity ~2.5) that translates to less resist consumption during th ARC-open etch. Compared to resists, TERA demonstrates better etch resistance while patterning dielectric stacks - the silicon oxide-to-TERA Selectivity exceeds 8. In this paper, the excellent optical tunability and substrate reflectivity control achieved with TERA are discussed. Clean lithography using 248 nm, 193 nm and e- beam resists is shown. The etch characteristics of TERA in fluorocarbon and halogen-based plasma chemistries are discussed. Finally, the formation of 135 nm and 120 nm deep trench patterns in thick dielectric stacks using TERA in conjunction with commercial 248 nm and 193 nm resists, respectively is demonstrated. The extendability of this approach to pattern silicon without roughening or microrevicing using sub-200 nm thick resists is motivated.

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