This PDF file contains the front matter associated with SPIE Proceedings Volume 9423 including the Title Page, Copyright information, Table of Contents, Introduction, and Conference Committee listing.

Block copolymer directed self-assembly (BCP-DSA) may provide a less costly method of forming sub-38nm pitch line-space patterns relative to proven HVM methods, but DSA needs to provide equivalent or improved defect density and pattern quality to warrant consideration for displacing current HVM methods. This paper evaluates the process constraints of three DSA flows and compares the pattern quality after pattern transfer for each flow at its optimal process conditions to the same pattern created by a proven HVM process flow.

In recent years major advancements have been made in the directed self-assembly (DSA) of block copolymers (BCP). Insertion of DSA for IC fabrication is seriously considered for the 7nm node. At this node the DSA technology could alleviate costs for double patterning and limit the number of masks that would be required per layer. At imec multiple approaches for inserting DSA into the 7nm node are considered. One of the most straightforward approaches for implementation would be for via patterning through templated DSA (grapho-epitaxy), since hole patterns are readily accessible through templated hole patterning of cylindrical phase BCP materials. Here, the pre-pattern template is first patterned into a spin-on hardmask stack. After optimizing the surface properties of the template the desired hole patterns can be obtained by the BCP DSA process. For implementation of this approach to be implemented for 7nm node via patterning, not only the appropriate process flow needs to be available, but also appropriate metrology (including for pattern placement accuracy) and DSA-aware mask decomposition are required. In this paper the imec approach for 7nm node via patterning will be discussed.

In this paper, we present an optimization methodology for the template designs of sub-resolution contacts using directed self-assembly (DSA) with grapho-epitaxy and immersion lithography. We demonstrate the flow using a 60nm-pitch contact design in doublet with Monte Carlo simulations for DSA. We introduce the notion of Template Error Enhancement Factor (TEEF) to gauge the sensitivity of DSA printing infidelity to template printing infidelity, and evaluate optimized template designs with TEEF metrics. Our data shows that SMO is critical to achieve sub-80nm non- L0 pitches for DSA patterns using 193i.

Diminishing error tolerance renders the customization of patterns created through directed self-assembly (DSA) extremely challenging at tighter pitch. A self-aligned customization scheme can be achieved using a hybrid prepattern comprising both organic and inorganic regions that serves as a guiding prepattern to direct the self-assembly of the block copolymers as well as a cut mask pattern for the DSA arrays aligned to it. In this paper, chemoepitaxy-based self-aligned customization is demonstrated using two types of organic-inorganic prepatterns. CHEETAH prepattern for “CHemoepitaxy Etch Trim using a self-Aligned Hardmask” of preferential hydrogen silsesquioxane (HSQ, inorganic resist), non-preferential organic underlayer is fabricated using electron beam lithography. Customized trench or hole arrays can be achieved through co-transfer of DSA-formed arrays and CHEETAH prepattern. Herein, we also introduce a tone-reversed version called reverse-CHEETAH (or rCHEETAH) in which customized line segments can be achieved through co-transfer of DSA-formed arrays formed on a prepattern wherein the inorganic HSQ regions are nonpreferential and the organic regions are PMMA preferential. Examples of two-dimensional self-aligned customization including 25nm pitch fin structures and an 8-bar “IBM” illustrate the versatility of this customization scheme using rCHEETAH.

Laser thermal annealing of PS-b-PMMA is shown to modify phase segregation within the milliseconds timeframe at temperatures from the glass transition to far above the order-disorder transition temperature. We report the kinetics of phase segregation of cylinder forming PS-b-PMMA (53.8 kg/mol, f_PS = 0.7) as probed by micro-beam grazing incidence small angle X-ray scattering. Structure evolution was probed as a function of peak temperature, time at temperature, and quench rate, with phase segregation readily occurring on millisecond time scales and at peak quench rates up to 10⁷ K/s. The final film morphology is dependent on both the anneal time and the quench rate to ambient. With heating to sufficiently high temperatures, the thermal history is erased yielding a final state is purely dependent on the quench rate.

Imprint lithography has been shown to be an effective technique for replication of nano-scale features. Jet and Flash Imprint Lithography (J-FIL) involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is cross-linked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. Criteria specific to any lithographic process for the semiconductor industry include overlay, throughput and defectivity. The purpose of this paper is to describe the technology advancements made and introduce the new imprint systems that will be applied for the fabrication of advanced devices such as NAND Flash memory and DRAM. Overlay of better than 5nm (mean + 3sigma) has been demonstrated, and throughputs of 10 wafers per imprint station are now routinely achieved. Defectivity has been reduced by more than two orders of magnitude and particle adders within the tool have come down by approximately four orders of magnitude. A pilot line tool, the FPA-1100 NZ2, was used to generate most of the results in this work and conceptual plans are in place to address the requirements necessary for high volume manufacturing with an attractive cost of ownership relative to other HVM solutions for the semiconductor industry.

Performances of the nanoimprint lithography templates were discussed considering the readiness toward the high volume manufacturing of nanoimprint lithography application along with the requirement for the templates and its fabrication process. The current status of the three major performances of the templates was shown.

The routine “on demand” fabrication of features smaller than 10 nm opens up new possibilities for the realization of many novel nanoelectronic, NEMS, optical and bio-nanotechnology-based devices. Based on the thermally actuated, piezoresistive cantilever technology we have developed a first prototype of a scanning probe lithography (SPL) platform able to image, inspect, align and pattern features down to single digit nano regime. The direct, mask-less patterning of molecular resists using active scanning probes represents a promising path circumventing the problems in today’s radiation-based lithography. Here, we present examples of practical applications of the previously published electric field based, current-controlled scanning probe lithography on molecular glass resist calixarene by using the developed tabletop SPL system. We demonstrate the application of a step-and-repeat scanning probe lithography scheme including optical as well as AFM based alignment and navigation. In addition, sequential read-write cycle patterning combining positive and negative tone lithography is shown. We are presenting patterning over larger areas (80 x 80 μm) and feature the practical applicability of the lithographic processes.

This article describes two- and three-dimensional optical simulations for determining optimal conditions for near-field scanning optical lithography. It was found that a combination of 30-nm thick photoresist and 50-nm thick anti-reflective coating will yield optimal results with 405 nm incident light and a hollow-cantilever probe with 100-nm aperture width. In addition to identifying the optimal conditions, the sensitivity of the resolution with respect to each parameter is explored and plotted. The mechanisms behind each trend are described with supporting simulation data.

To demonstrate the possibility of using EBID masks for sub-10 nm pattern transfer into silicon, first experiments were carried out by using 20-40 nm EBID masks, that were etched by different chemistries. It is experimentally verified that recipes based on hydrogen bromide, chlorine and boron trichloride can selectively etch silicon when using 20-40 nm masks made by EBID. We observed an enhancement of the height ratio, i.e. the ratio of the height of structures before and after etching, up to a factor of 3.5 when using the chlorine chemistry. To demonstrate the pattern transfer of sub-10 nm structures, further experiments were carried out using 8-20 nm EBID masks in combination with hydrogen bromide, chlorine and fluorine chemistries. Fluorine chemistry provided the best results in terms of surface smoothness and height ratio. In this case, 7.4 nm lines were successfully transferred into silicon, resulting in 14.3 nm wide lines with a height ratio of approximately 5.

By the combination of focused ion beam (FIB) local gallium implantation and selective silicon etching and diffusive boron doping it is presented a fast and flexible fabrication method that allows the creation of silicon structures of various geometries. The structures obtained by this resistless approach are electrically conductive. Free suspended mechanical resonators of different dimensions and geometries had been fabricated and measured. The resulting devices present a good electrical conductivity which is employed to characterize their high frequency mechanical response by electrical methods. Combining this method with other fabrication approaches it is feasible to fabricate singular devices adapted to specific applications.

High defect density in thermodynamics driven DSA flows has been a major cause of concern for a while and several questions have been raised about the relevance of DSA in high volume manufacturing. The major questions raised in this regard are: 1. What is the intrinsic level of DSA-induced defects, 2. Can we isolate the DSA-induced defects from the other processes-induced defects, 3. How much do the DSA materials contribute to the final defectivity and can this be controlled, 4. How can we understand the root causes of the DSA-induced defects, their kinetics of annihilation and finally, 5. Can we have block co-polymer anneal durations that are compatible with standard CMOS fabrication techniques (in the range of minutes) with low defect levels. This manuscript addresses these important questions and identifies the issues and the level of control needed to achieve a stable DSA defect performance.

Directed self-assembly (DSA) of block copolymers (BCPs) is a promising technology for advanced patterning at future technology nodes, but significant hurdles remain for commercial implementation. While chemoepitaxy processes employing poly(styrene-block-methyl methacrylate) (PS-PMMA) are most widely studied for DSA line/space patterning, graphoepitaxy processes using more strongly segregated “high-X;” block copolymers have recently shown a lot of promise, with lower defectivity and line-width roughness (LWR) than comparative chemoepitaxy processes. This paper reports on some of the design considerations for optimizing line/space patterning with these materials. We have found that brush and block copolymer selection are critical to achieve high quality DSA. For example, brush thickness must be optimized to achieve matching space critical dimensions, and brush surface energy impacts kinetics of assembly. The X parameter of the block copolymer should be optimized to balance LWR, kinetics of assembly, and process window. Glass transition temperature (T_g) of the blocks showed little impact on performance. Overall, parameters of both BCP and brush must be simultaneously optimized to achieve high quality DSA.

A new imprint directed self-assembly (DSA) route is developed for creating high resolution line patterns consisting of in-plane polystyrene-block-polydimethylsiloxane (PS-b- PDMS) cylinders. Resist line prepatterns are prepared by nanoimprint and trimmed by oxygen plasma to proper feature geometry and dimension. Registered block copolymer line patterns with exceptional long-range order are generated after DSA then, with the smallest half-pitch of 6 nm or so. Excellent stretching capability of PS-b-PDMS polymer chains indicates a broad process window for DSA. Initial pattern transfer results at 16.5 nm pitch imply the potential of this approach for future nanodevice fabrication at ultra-high pattern resolution.

Significant progresses on 300 mm wafer level DSA (Directed Self-Assembly) performance stability and pattern quality were demonstrated in recent years. DSA technology is now widely regarded as a leading complementary patterning technique for future node integrated circuit (IC) device manufacturing. We first published SMART^TM DSA flow in 2012. In 2013, we demonstrated that SMART^TM DSA pattern quality is comparable to that generated using traditional multiple patterning technique for pattern uniformity on a 300 mm wafer. In addition, we also demonstrated that less than 1.5 nm/3σ LER (line edge roughness) for 16 nm half pitch DSA line/space pattern is achievable through SMART^TM DSA process. In this publication, we will report impacts on SMART^TM DSA performances of key pre-pattern features and processing conditions. 300mm wafer performance process window, CD uniformity and pattern LER/LWR after etching transfer into carbon-hard mask will be discussed as well.

A 27nm-pitch Graphoepitaxy directed self-assembly (DSA) process targeting fin formation for FinFET device fabrication is studied in a 300mm pilot line environment. The re-designed guiding pattern of graphoepitaxy DSA process determines not only the fine DSA structures but also the fin customization in parallel direction. Consequently, the critical issue of placement error is now resolved with the potential of reduction in lithography steps. However, challenges in subsequent pattern transfer are observed due to insufficient etch budget. The cause of the issues and process optimization are illustrated. Finally, silicon fins with 100nm depth in substrate with pre-determined customization is demonstrated.

In this paper, we present a route for making smart functionalized plastic parts by injection molding with sub-micrometer surface structures. The method is based on combining planar processes well known and established within silicon micro and sub-micro fabrication with proven high resolution and high fidelity with truly freeform injection molding inserts. The link between the planar processes and the freeform shaped injection molding inserts is enabled by the use of nanoimprint with flexible molds for the pattern definition combined with unidirectional sputter etching for transferring the pattern. With this approach, we demonstrate the transfer of down to 140 nm wide holes on large areas with good structure fidelity on an injection molding steel insert. The durability of the sub-micrometer structures on the inserts have been investigated by running two production series of 102,000 and 73,000 injection molded parts, respectively, on two different inserts and inspecting the inserts before and after the production series and the molded parts during the production series.

Due to its high resolution and applicability for large area patterning, Nanoimprint Lithography (NIL) is a promising technology for photovoltaic (PV) applications. However, a successful industrial application of NIL processes is only possible if large-area processing on thin, brittle and potentially rough substrates can be achieved in a high-throughput process. In this work, the development of NIL processes using the novel SmartNIL^TM technology from EV Group with a focus on PV applications is described. We applied this tooling to realize a honeycomb texture (8 μm period) on the front side of multicrystalline silicon solar cells leading to an improvement in optical efficiency of 7% relative and a total efficiency gain of 0.5% absolute compared to the industrial standard texture (isotexture). On the rear side of monocrystalline silicon solar cells, we realized diffraction gratings to make use of light trapping effects. An absorption enhancement of up to 35% absolute at a wavelength of 1100 nm is demonstrated. Furthermore, we combined photolithography and NIL processes to introduce features for metal contacts into honeycomb master structures, which initially were realized using interference lithography. As final application, we investigated the realization of very fine contact fingers with prismatic shape in order to minimize reflection losses.

Nanosculpting, the fabrication of two- and three-dimensional shapes at the nanoscale, enables applications in photonics, metamaterials, multi-bit magnetic memory, and bio-nanoparticles. A promising high resolution and high throughput method for nanosculpting is nanoimprint lithography (NIL). A key requirement to achieving manufacturing viability of nanosculptures in NIL is maintaining image fidelity through each step of the imprinting process. In particular, polymer densification during UV curing can distort the imprinted image. Here we study the shape changes introduced by polymer densification and develop a forward method for predicting changes in nanoscale geometries from UV curing. We show that shape changes by polymer densification are governed by the Poisson’s ratio, the shrinkage coefficient of the polymer resist, and the geometric aspect ratios of the nanosculpted shape. We also show that the size of the residual layer does not impact the final profile of the imprinted shape.

The incident surface power density in Massive Electron-beam Direct Write (MEBDW) during exposure is ~10⁵ W/cm², much higher than ~8 W/cm² ArF scanners and 2.4 W/cm² EUV. In addition, the wafer’s exposure in vacuum environment makes energy dissipation even harder. This thermal effect can cause mechanical distortion of the wafer during exposure and have has a direct influence on pattern placement error and image blur. In this paper, the thermo mechanical distortions caused by wafer heating for MEB system of different electron acceleration voltages have been simulated with finite element method (FEM). The global thermal effect affected by the friction force between the wafer and the wafer chuck as well as different thermal conductivities of the chuck material are simulated. Furthermore, the thermal effects of different lithography systems such as EUV scanners and conventional optical scanners are compared. The thermal effects of MEBDW systems are shown to be acceptable.

E-beam Direct Write (EBDW) process window simulations were performed on critical layers in Altera designs of the 20 nm node (minimum metal half-pitch 32 nm). For selected layout clips, a direct comparison is made with 193i simulation results. Local Interconnect and Via0 (single patterning) and Metal1 (Litho-Etch-Litho-Etch (LELE) double patterning) layers are considered. The EBDW dose latitude was found to exceed that of the 193i process by a factor 4. As the electron beam total spot size is of the order of the Critical Dimension (CD) for the considered node, interplay between neighboring features is low. This results in straightforward data preparation with typically 2 kernels and ‘clean’ process windows. The latter are mainly limited by Edge Placement Errors of Line Ends. The curves for the various simulation sites roughly overlap, as opposed to the 193i case in which they differ significantly. In EBDW the performance of square vias equals that of rectangular vias, enabling a denser via packing.

In this study a novel stitching method other than Soft Edge (SE) and Smart Boundary (SB) is introduced and benchmarked against SE. The method is based on locally enhanced Exposure Latitude without cost of throughput, making use of the fact that the two beams that pass through the stitching region can deposit up to 2x the nominal dose. The method requires a complex Proximity Effect Correction that takes a preset stitching dose profile into account. On a Metal clip at minimum half-pitch of 32 nm for MAPPER FLX 1200 tool specifications, the novel stitching method effectively mitigates Beam to Beam (B2B) position errors such that they do not induce increase in CD Uniformity (CDU). In other words, the same CDU can be realized inside the stitching region as outside the stitching region. For the SE method, the CDU inside is 0.3 nm higher than outside the stitching region. 5 nm direct overlay impact from B2B position errors cannot be reduced by a stitching strategy.

Making the best use of the characteristic features in nanocrystalline Si (nc-Si) ballistic hot electron source, the alternative lithographic technology is presented based on the two approaches: physical excitation in vacuum and chemical reduction in solutions. The nc-Si cold cathode is a kind of metal-insulator-semiconductor (MIS) diode, composed of a thin metal film, an nc-Si layer, an n⁺-Si substrate, and an ohmic back contact. Under a biased condition, energetic electrons are uniformly and directionally emitted through the thin surface electrodes. In vacuum, this emitter is available for active-matrix drive massive parallel lithography. Arrayed 100×100 emitters (each size: 10×10 μm², pitch: 100 μm) are fabricated on silicon substrate by conventional planar process, and then every emitter is bonded with integrated complementary metal-oxide-semiconductor (CMOS) driver using through-silicon-via (TSV) interconnect technology. Electron multi-beams emitted from selected devices are focused by a micro-electro-mechanical system (MEMS) condenser lens array and introduced into an accelerating system with a demagnification factor of 100. The electron accelerating voltage is 5 kV. The designed size of each beam landing on the target is 10×10 nm² in square. Here we discuss the fabrication process of the emitter array with TSV holes, implementation of integrated ctive-matrix driver circuit, the bonding of these components, the construction of electron optics, and the overall operation in the exposure system including the correction of possible aberrations. The experimental results of this mask-less parallel pattern transfer are shown in terms of simple 1:1 projection and parallel lithography under an active-matrix drive scheme.

Another application is the use of this emitter as an active electrode supplying highly reducing electrons into solutions. A very small amount of metal-salt solutions is dripped onto the nc-Si emitter surface, and the emitter is driven without using any counter electrodes. After the emitter operation, thin metal (Cu, Ni, Co, and so on) and elemental semiconductors (Si and Ge) films are uniformly deposited on the emitting surface. Spectroscopic surface and compositional analyses indicate that there are no significant contaminations in deposited thin films. The implication is that ballistic hot electrons injected into solutions with appropriate kinetic energies induce preferential reduction of positive ions in solutions with no by-products followed by atom migration, nuclei formation, and the subsequent thin film growth. The availability of this technique for depositing thin SiGe films is also demonstrated by using a mixture solution. When patterned fine emission windows are formed on the emitter surface, metal and semiconductor wires array are directly deposited in parallel.

A viable pattern customization strategy is a critical to continue fin pitch scaling. Analysis shows that a self-aligned customization scheme will be required for fin pitch scaling beyond 20nm. In this paper, we explore scaling of the Tone-Inverted Grapho-Epitaxy technique with 24nm pitch PS-b-PMMA polymer to create groups of fins with self-aligned spaces in between. We discuss material selection, self-aligned customization, and etch processes to form 24-nm-pitch fins on silicon on insulator substrates. We demonstrate two-dimensional pattern customization at 24nm pitch, confirming scalability of this approach. FinFET device integration results at both 28 and 24 nm pitches shows a promising path for continued fin pitch scaling.

Directed self-assembly (DSA) of lamellae-forming block copolymers (BCP) via chemo-epitaxy is a potential lithographic solution to achieve patterns of dense features. Progress to date demonstrates encouraging results, but in order to better understand the role of all parameters, systematic analysis of each factor needs to be assessed. Small changes in the volume fraction of a lamellae-forming BCP have been shown to change the connectivity of unguided domains. When an asymmetric lamellae-forming BCP is assembled on chemical patterns generated with the LiNe flow, the patterning performance and defect modes change depending on whether the majority or minority volume fraction phase is guided by the chemical pattern. Asymmetric BCP formulations were generated by blending homopolymer with a symmetric BCP. The patterning performance of the BCP formulations was assessed for different pattern pitches, guide stripe widths, backfill materials and annealing times. Optical defect inspection and SEM review are used to track the majority defect mode for each formulation. Formulation-dependent trends in defect modes show the importance of optimizing the BCP formulation in order to minimize the defectivity.

In this study, half-pitch (HP) 15 nm line-and-space (L/S) metal wires were successfully fabricated and fully integrated on a 300 mm wafer by applying directed self-assembly (DSA) lithography and pattern transfer for semiconductor device manufacturing. In order to evaluate process performances of DSA, we developed a simple sub-15 nm L/S patterning process using polystyrene-block-poly(methyl methacrylate) (PS-b-PMMA) lamellar block copolymer (BCP), which utilizes trimming resist and shallow etching spin-on-glass (SOG) as pinning guide[1]-[4]. From the results of defect inspection after SOG etch using Electron Beam (EB) inspection system, defects were classified as typical DSA defects or defects relating to DSA pattern transfer. From the evaluation of DSA L/S pattern Critical Dimension (CD), roughness and local placement error using CD-SEM, it is considered that isolated PS lines are placed at the centerline between guides and that placement of paired PS lines depends on the guide width. The control of the guide resist CD is the key to local placement error and the paired lines adjacent to the guide shifted toward the outside (0.5 nm) along the centerline of the isolated line after SOG etch. We demonstrated fabrication of HP 15 nm metal wires in trenches formed by the DSA process with reactive ion etching (RIE), followed by metal chemical vapor deposition (CVD) and chemical mechanical polishing (CMP). By SEM observation of alignment errors between the trenches and connect spaces, overlay shift patterns (-4 nm) in guide lithography mask were fabricated without intra-wafer alignment errors.

Density multiplication and contact shrinkage of patterned templates by directed self-assembly (DSA) of block copolymers (BCP) stands out as a promising alternative to overcome the limitations of conventional lithography. The main goal of this paper is to investigate the potential of DSA to address contact and via levels patterning with high resolution by performing either CD shrink or contact multiplication. Different DSA processes are benchmarked based on several success criteria such as: CD control, defectivity (missing holes) as well as placement control. More specifically, the methodology employed to measure DSA contact overlay and the impact of process parameters on placement error control is detailed. Using the 300mm pilot line available in LETI and Arkema’s materials, our approach is based on the graphoepitaxy of PS-b-PMMA block copolymers. Our integration scheme, depicted in figure 1, is based on BCP self-assembly inside organic hard mask guiding patterns obtained using 193i nm lithography. The process is monitored at different steps: the generation of guiding patterns, the directed self-assembly of block copolymers and PMMA removal, and finally the transfer of PS patterns into the metallic under layer by plasma etching. Furthermore, several process flows are investigated, either by tuning different material related parameters such as the block copolymer intrinsic period or the interaction with the guiding pattern surface (sidewall and bottom-side affinity). The final lithographic performances are finely optimized as a function of the self-assembly process parameters such as the film thickness and bake (temperature and time). Finally, DSA performances as a function of guiding patterns density are investigated. Thus, for the best integration approach, defect-free isolated and dense patterns for both contact shrink and multiplication (doubling and more) have been achieved on the same processed wafer. These results show that contact hole shrink and multiplication approach using DSA is well compatible with the conventional integration used for CMOS technology.

In this paper we address an important topic for the development of block copolymer directed self assembly, which is the lack of the third dimensional information. The three-dimensional shape of the DSA feature directly impacts the ability to transfer the DSA pattern into etched patterns. Through TEM sample preparation by in-situ focused ion beam (FIB) Pt deposition and milling, we show cross-sectional images for the two most elemental building blocks of directed self assembled block copolymers, namely, the single and double-hole (peanut shape) etched in Si structures with great contrast at the interface formed by PS and PMMA. Additionally, a hard-mask single hole structure processed with a different template material is shown as well. Elemental mapping with energy filtered TEM (EFTEM) was shown to assist interpretation of images. 3D reconstruction of the holes formed in the hard-mask sample was performed using dark field (DF) STEM. A reduction in the SOC and SOG thickness was observed post in-situ Pt deposition for the hard mask structure. Further TEM sample preparation improvements will be needed to minimize the compression observed.

SEMATECH aims to identify and enable disruptive technologies to meet the ever-increasing demands of semiconductor high volume manufacturing (HVM). As such, a program was initiated in 2012 focused on high-speed e-beam defect inspection as a complement, and eventual successor, to bright field optical patterned defect inspection [1]. The primary goal is to enable a new technology to overcome the key gaps that are limiting modern day inspection in the fab; primarily, throughput and sensitivity to detect ultra-small critical defects. The program specifically targets revolutionary solutions based on massively parallel e-beam technologies, as opposed to incremental improvements to existing e-beam and optical inspection platforms. Wafer inspection is the primary target, but attention is also being paid to next generation mask inspection. During the first phase of the multi-year program multiple technologies were reviewed, a down-selection was made to the top candidates, and evaluations began on proof of concept systems. A champion technology has been selected and as of late 2014 the program has begun to move into the core technology maturation phase in order to enable eventual commercialization of an HVM system. Performance data from early proof of concept systems will be shown along with roadmaps to achieving HVM performance. SEMATECH’s vision for moving from early-stage development to commercialization will be shown, including plans for development with industry leading technology providers.

Targeting mass production of nanostructures, nanoimprint lithography (NIL) is one of the most cost-effective ways to do so. One of the most critical topics is the pattern quality of the imprint master template. Therefore the new Vistec SB4050 VSB e-beam writer has been evaluated regarding its capability for state-of-the-art NIL template and DOE making. Equipped with a new air bearing stage the tool can expose a wide variety of substrates including large and heavy ones. For 9035 substrates a placement accuracy of 9nm (3sigma) as well as an overlay accuracy of 7nm (3sigma) with a mean error below 2nm has been achieved. Targeting for minimum feature size, a resolution below 30nm has been achieved for both, dense lines and holes pattern even using CAR. In addition, 3D structuring capability has been proved by applying GenISys’ Layout Beamer calibrated for an appropriate negative tone resist. Further investigation has been done on shot count optimization regarding circular holes respective pillars. Using a feature size dependent segmentation, writing time reduction could be achieved keeping the original feature shape. Besides screening of typical tool parameter an application driven evaluation has been done by fabricating different type of templates based on silicon and quartz. 2D and 3D features have been realized. Furthermore holograms have been fabricated and proved for their performance by optical measurements.

Electron beam direct write lithography (EBDW) potentially offers advantages for low-volume semiconductor manufacturing, rapid prototyping or design verification due to its high flexibility without the need of costly masks. However, the integration of this advanced patterning technology into complex CMOS manufacturing processes remains challenging. The low throughput of today’s single e-Beam tools limits high volume manufacturing applications and maturity of parallel (multi) beam systems is still insufficient [1,2]. Additional concerns like transistor or material damage of underlying layers during exposure at high electron density or acceleration voltage have to be addressed for advanced technology nodes. In the past we successfully proved that potential degradation effects of high-k materials or ULK shrink can be neglected and were excluded by demonstrating integrated electrical results of 28nm node transistor and BEOL performance following 50kV electron beam dry exposure [3]. Here we will give an update on the integration of EBDW in the 300mm CMOS manufacturing processes of advanced integrated circuits at the 28nm SRAM node of GLOBALFOUNDRIES Dresden. The work is an update to what has been previously published [4]. E-beam patterning results of BEOL full chip metal and via layers with a dual damascene integration scheme using a 50kV VISTEC SB3050DW variable shaped electron beam direct writer at Fraunhofer IPMSCNT are demonstrated. For the patterning of the Metal layer a Mix & Match concept based on the sequence litho - etch -litho -etch (LELE) was developed and evaluated wherein several exposure fields were blanked out during the optical exposure. Etch results are shown and compared to the POR. Results are also shown on overlay performance and optimized e-Beam exposure time using most advanced data prep solutions and resist processes. The patterning results have been verified using fully integrated electrical measurement of metal lines and vias on wafer level. In summary we demonstrate the integration capability of EBDW into a productive CMOS process flow at the example of the 28nm SRAM technology node.

Maskless electron beam lithography is an attractive solution to address sub-90 nm technology nodes with high throughput and manufacturing costs reduction. One of the key challenges is to meet entirely process/integration specifications in terms of resolution, resist sensitivity, roughness and etch transfer into underlayers. In this paper, we evaluate and identify the optimal stack to fit printing performance using e-beam exposures and etch transfer patterning. Besides imaging performance, other key parameters such as outgassing and charge dissipation due to high current density are also considered to fully achieve targets for the machine developed by MAPPER Lithography.

In E-beam lithography, the double or multiple Gaussian kernels used to describe the electron scattering behavior have been discussed extensively for critical dimensions (CDs) larger than the e-beam blur size. However in e-beam direct write on wafer, CD dimensions are close to the beam blur size because of requirements in both resolution and throughput. This situation gives rise to a severe iso-dense CD bias. Hence the accuracy of the modeling kernel is required to achieve a larger common process window. In this paper we present contour-based kernel modeling and verification for e-beam lithography. The edge contours of CD-SEM images of the contact hole array pattern with duty ratio splits are used in this Gaussian kernel modeling study. A 2-step optimization sequence is proposed to improve the fitting efficiency and robustness. In the first step, roundness is the primary and the most effective index at the corner region which is sensitive to determine the beam blur size. The next step is to minimize the deviation of the through-pitch proximity effect by adjusting the ratio of the electron backscattering to the electron forward scattering. The more accurate cost index, edge placement error, is applied in the subsequent optimization step with constrained beam blur sizes extracted from the previous step. The optimum modeling kernel parameters can be obtained by the lowest cost deviation of the simulation contours and the CD-SEM extracted edge contours after optimization iterations. For early study of the proximity impact on future EBDW systems, the exposure experiment is performed on an EBM-8000 mask writer to build the modeling kernel. The prediction accuracy of the optimum modeling kernel on 60-nm features with different pattern densities is also verified experimentally to be within 1.5 nm.

Verification of full-chip DSA guide patterns (GPs) through simulations is not practical due to long runtime. We develop a decision function (or functions), which receives n geometry parameters of a GP as inputs and predicts whether the GP faithfully produces desired contacts (good) or not (bad). We take a few sample GPs to construct the function; DSA simulations are performed for each GP to decide whether it is good or bad, and the decision is marked in n-dimensional space. The hyper-plane that separates good marks and bad marks in that space is determined through machine learning process, and corresponds to our decision function. We try a single global function that can be applied to any GP types, and a series of functions in which each function is customized for different GP type; they are then compared and assessed in 10nm technology.

Cylindrical directed self-assembly (DSA) nanostructures is a promising candidate for patterning the contacts and vias in integrated circuits. To match the contact patterns in an IC layout, physical guiding templates have been adopted to generate aperiodic DSA patterns, and templates of different sizes could lead to various DSA patterns. It is found in the experiment that the density of guiding templates has a strong influence on the DSA patterns. At a low template density, templates tend to become overfilled and result in DSA defects. In this paper, we experimentally demonstrate an effective solution to counteract the influence of template pattern density on the quality of DSA using sub-DSA-resolution Assist Features (SDRAFs). We show that SDRAFs can reduce the DSA defects significantly.

DSA-aware optical or EUV lithography assist features (AFs) extend the capabilities of both traditional SRAFs and printable AFs (PrAFs). For instance, in a graphoepitaxy DSA process, where confinement wells are formed by DUV lithography, the process window of the DUVL process may be further improved by using PrAFs, as long as the confinement wells resulting from these PrAFs are sized and shaped so that they are “sealed” by the etch resistant outcomes of the DSA process. A method to optimize placement of such DSA-aware PrAFs is presented, along with a method utilizing a regular array of etch resistant confinement wells with localized modifications of their size or shape to form etch transferrable features. Both methods are tested and verified in simulations of DUV lithography and DSA.

A major challenge in the application of block copolymer directed self-assembly (DSA) to advanced lithography is the exploration of large design spaces, including the selection of confinement shape and size, surface chemistry to affect wetting conditions, copolymer chain length and block fraction. To sweep such large spaces, a computational model is ideally both fast and accurate. In this study, we investigate various incarnations of the density functional theory (DFT) approach and evaluate their suitability to DSA applications. We introduce a new optimization scheme to capitalize on the speed advantages of DFT, while minimizing loss of accuracy relative to the benchmark of self-consistent field theory (SCFT). Although current DFT models afford a 100-fold reduction in computational complexity over SCFT, even the best optimized models fail to match SCFT density profiles and make extremely poor predictions of commensurability windows and defect energetics. These limitations suggest that SCFT will remain the gold standard for DSA simulations in the near future.

Chemoepitaxial guidance of block copolymer (BCP) directed self-assembly (DSA) in thin films is explored. The underlayers studied are line-space patterns composed of repeating highly preferential pinning stripes separated by larger, more neutral, background regions. Studies have shown that varying the properties of such a chemical pattern can have a large effect on processing window, but the effect of changing the chemical pattern on many properties of interest such as footing of the BCP are hard to measure experimentally. This study uses a coarse-grained molecular dynamics model to study a 2x density multiplying underlayer by varying the pinning stripe width and background region chemical interactions and analyzing the effect on self-assembled BCP lines. Decreasing pinning stripe width or making the background region more neutral is found to increase the LER of the lines. An undersized pinning stripe width with a neutral background region is found to give the straightest sidewalls for the formed lines, while a larger pinning stripe causes the pinned line to foot (expand near the substrate) and a preferential background region causes the unpinned line to undercut (contract near the substrate). A simple model was developed to predict the optimal conditions to eliminate footing. Using this model, conditions are found that decrease footing of the pinned line but these conditions increase undercutting in the unpinned line. Deformations in either the pinned or unpinned line propagate to the other line. There exists a tradeoff between LER and the footing/undercutting, that is, decreasing LER increases footing/undercutting and vice versa.

Directed self-assembly of block copolymers over chemically patterned substrates has proven to be an effective method for sublithographic patterning. Features on these chemical patterns can be multiplied by the natural domain-spacing of the block copolymer assembled on top of the substrate through pattern interpolation. The LiuNealey (LiNe) chemoepitaxy flow for directed self-assembly allows for modification of the geometry and chemistry of the nanopatterned substrate. The critical dimensions and period along with the chemical composition of the patterned features in the LiNe flow govern the equilibrium morphology of the assembled block copolymer. We demonstrate how the construction of the chemical pattern affects the selection for desired, well-registered assembly of block copolymer melts by using a theoretically informed coarse-grained many-body model of block copolymers. The molecular simulations are used to provide an explanation for how to best design the chemical pattern in the LiNe flow for the directed self-assembly (DSA) of block copolymers to achieve desired line-andspace structures.

Many high χ block copolymer (BCP) systems often have one block which shows a strong preference to wet the free interface at the top of the film. This property makes it difficult to form vertically aligned lamellae which are desired for many directed self-assembly (DSA) applications. To better understand this behavior, simulations of thin films of BCPs were carried out using a coarse-grained molecular dynamics (MD) model. The property that leads one block to preferentially wet the free interface over the other is a difference in cohesive energy density (CED) between the two blocks. Our simulation allows for the systematic variation in the CED of each block to investigate how the magnitude of these differences affects self-assembly behavior. BCPs with no CED differences between the blocks show large ranges of underlayer compositions where vertical lamellae will form that are minimally affected by changing χ of the BCP. The range where vertical lamellae will form can be thought of as a process window. Increasing the CED asymmetry of the BCP (i.e. the difference in CED between blocks) causes a reduction in the process window and also causes a shift in the underlayer composition that is the center of the window. Increasing χ increases the process window for vertical lamellae in CED asymmetric systems. This behavior is determined by the trade-off in energy due to three interfacial interactions: A-B interface, film-free surface interface, and film-underlayer interface. At the limits of very high CED asymmetry and low χ, there may be no underlayer compositions where vertical lamellae will form. A simplified model was also developed that can accurately predict these process windows for different CED asymmetry and χ values on the order of seconds and minutes compared to hours and days for the full simulation.

Nano-imprinting technology, as one of the most promising fabrication technologies, has been demonstrated to be a powerful tool for large-area replication up to wafer-level, with features down to nanometer scale. This study aims to develop capabilities in patterning nano structure using thermal nano-imprint lithography (NIL). 30nm Si molds are patterned by electron-beam lithography (EBL) using NEB22 A2 negative e-beam resist. The NEB22 A2 negative e-beam resist possess a variety of characteristics desirable for NIL, such as low viscosity, low bulk-volumetric shrinkage, high Young's modulus, high thermal stability, and excellent dry-etch resistance. The excellent oxygenetch resistance of the barrier material enables a final transfer pattern that is about three times higher than that of the original NIL mold. Based on these imprint on negative electron beam resist approach is used for pattern transfer into silicon substrates. The result is a high-resolution pattern with feature sizes in the range of nanometer to several microns.

The methodology suggested in this research provides the great possibility of creating nanostructures composed of various materials, such as soft polymer, hard polymer, and metal, as well as Si. Such nanostructures are required for a vast range of optical and display devices, photonic components, physical devices, energy devices including electrodes of secondary batteries, fuel cells, solar cells, and energy harvesters, biological devices including biochips, biomimetic or biosimilar structured devices, and mechanical devices including micro- or nano-scale sensors and actuators.

About 13-Terabyte data for Massive e-beam direct-write lithography (MEBDW) system, a potential solution for highvolume manufacturing (HVM) of 10-nm and beyond technology nodes in a 26 mm x 33 mm field of layout, is required. Therefore cost reduction on data storage and transmission through development of high compression rate of lossless data and high throughput real time decompression algorithms is necessary. In this paper, an instruction-based hybrid method (IBHM) is proposed. It is an asymmetric scheme to hybrid simple compression methods. The decompression is achieved by instruction-based decoding. The input layout image is partitioned into different fragments, compressed and encoded into instructions. On the MEBDW system side, the encoded bit-stream is decoded by the IBHM decoder. The function of this decoder is to execute only a minimal number of simple instructions, thus the decoder can be implemented with low gate-count on ASIC. Simulation results show that a single IBHM decoder is capable of providing an output data rate as high as ~50 Gbps in various masking layers.

In addition to sub-20 nm technology nodes, multi-beam lithography at low-energy has also the capability to address mature CMOS technologies [130-45nm nodes] with high throughput and significant manufacturing costs reduction. It requires both “fast” resists for throughput gain and cost of ownership and “thick” resists matched with the current post-lithography processes such as etching and implant steps. We successfully demonstrated patterning of 45-130 nm nodes structures on different thick resists (up to 160 nm) with a 5 keV Mapper pre-alpha tool. In parallel, we developed a theoretical model to simulate 3D patterning showing good agreement with our experimental results.

In this paper, we investigate an electric-field assisted assembly approach to create dense arrays of contact hole patterns with complex feature geometries. This hybrid strategy uses a spatially varying dielectrophoretic (DEP) force created by lithographically defined guiding features to assemble dense arrays of nanoparticles within the features, thereby replicating features within the starting pattern. For close-packed particle arrays, the half- and full-pitch of the contact hole array is defined by the starting nanoparticle core and shell diameter.

Novel metallic light-interfering fixtures were designed and fabricated in order to achieve a laser interference pattern of constant-pitch, concentric and sinusoidal light variations. These fixtures consisted of annular rings with the inner diameter shaped conically. Azobenzene-containing solid thin-films were subsequently placed behind the fixture and circular surface-relief diffraction gratings were inscribed due to the azo molecules photochemical isomerization process. Gratings pitches were dependent on the fixture dimensions and ranged from 600 to 1400 nm with depths up to 250 nm.

Recent work with dielectric resonant reflector underlayers has shown improvements in high aspect ratio imaging via solid immersion evanescent interference lithography in the ultra-high numerical aperture (UHNA) regime. Controlling the gap at the prism/sample interface has proven to be a problem for good reproducibility, uniformity and quality of UHNA regime, high aspect ratio, resist structures. Here we present simulated and experimental results for fine tuning of the prism/sample interface to achieve greater uniformity of high aspect ratio resist structures over large exposure fields in the evanescent regime. These results highlight our solid immersion Lloyd’s mirror interference lithography (SILMIL) system’s limitations in the absence and presence of an index-matching layer (IML) through the use of gap control measurements and attenuated total internal reflection (ATR) measurements with various index mismatched prism/IML pairs. Finally, we present simulated results for a system that will produce uniform, high aspect ratio resist structures over large exposure fields.

We report computational study for directed self-assembly (DSA) on morphologies’ dislocation caused by block copolymers’ (BCPs’) thermal fluctuation in grapho-epitaxial cylindrical guides. The dislocation factor expressed as DSA-oriented placement errors (DSA-PEs) was numerically evaluated by historical data acquisition utilizing dissipative particle dynamics simulation. Calculated DSA-PEs was compared with experimental results on two kinds of guide pattern, resist guide with no surface modifications (REF guide) and resist guide with polystyrene coated (PS-brush guide). Vertical distribution of DSA-PEs within the cylindrical guides was calculated and relatively high DSA-PEs near top region was deduced particularly in REF guide. The tendency of experimental DSA-PEs was well explained by the calculation including a fluctuation parameter on the wall particles. In PS-brush guide, calculated DSA-PEs was drastically increased with becoming the guide more fluctuating. This result indicates to fabricate hard and steady guide condition in PS-brush guide so as to achieve better placements. From the variety of guide critical dimension (CD) computation, it is suggested that smaller guide CD is better to obtain good placements. The smallest DSA-PE value in this study was observed in PS-brush guide with smaller guide CD because of the strong restriction of BCP arrangement flexibility.

Directed self-assembly of block copolymers (BCPs) is a process that has received great interest in the field of nanomanufacturing in the past decade, and great strides towards forming high quality aligned patterns have been made. But state of the art methods still yield defectivities orders of magnitude higher than is necessary in semi-conductor fabrication even though free energy calculations suggest that equilibrium defectivities are much lower than is necessary for economic semi-conductor fabrication. This disparity suggests that the main problem may lie in the kinetics of defect removal. This work uses a coarse-grained model to study the rates, pathways, and dependencies of healing a common defect to give insight into the fundamental processes that control defect healing and give guidance on optimal process conditions for BCP-DSA. It is found that infinitely thick films yield an exponential drop in defect heal rate above χN ~ 30. Below χN ~ 30, the rate of transport was similar to the rate at which the transition state was reached so that the overall rate changed only slightly. The energy barrier in periodic simulations increased with 0.31 χN on average. Thin film simulations show no change in rate associated with the energy barrier below χN ~ 50, and then show an increase in energy barrier scaling with 0.16χN. Thin film simulations always begin to heal at either the free interface or the BCP-underlayer interface where the increased A-B contact area associated with the transition state will be minimized, while the infinitely thick films must start healing in the bulk where the A-B contact area is increased. It is also found that cooperative chain movement is required for the defect to start healing.

Directed self-assembly (DSA) of block copolymers has attracted attention for its use as a simple, cost- effective patterning tool for creating vertical interconnect access (VIA) channels in nanoelectronic devices.^{1, 2} This technique supplements existing lithographic technologies to allow for the creation of high-resolution cylindrical holes whose diameter and placement can be precisely controlled. In this study, we use self-consistent field theory (SCFT) simulations to investigate the equilibrium configurations of under-filled DSA systems with air-polymer interactions. We report on a series of SCFT simulations of our three species (PMMA-b-PS diblock and air) model in cylindrical confinement to explore the role of template diameter, under-fill fraction (i.e. volume fraction of air), air-polymer surface interaction and polymer-side wall/substrate interactions on equilibrium morphologies in an under-filled template with a free top surface. We identify parameters and system configurations where a meniscus appears and explore cases with PMMA-attractive, PS-attractive, and all-neutral walls to understand the effects of wall properties on meniscus geometry and DSA morphology. An important outcome is an understanding of the parameters that control the contact angle of the meniscus with the wall, as it is one of the simplest quantitative measures of the meniscus shape. Ultimately, we seek to identify DSA formulations, templates, and surface treatments with predictable central cylinder diameter and a shallow contact angle, as these factors would facilitate broad process windows and ease of manufacturing.

Thin films of lamellar poly(styrene-b-methyl methacrylate) (PS-PMMA) block copolymers were prepared on brushed silicon substrates with a range of thicknesses. The brushes are expected to eliminate preferential interactions at the substrate, thereby enabling perpendicular domain orientations relative to the interfaces. Using a combination of surface microscopy and grazing incidence small-angle X-ray scattering, we demonstrate that i) the brushed substrates are weakly preferential to PMMA; and ii) the average lamellar domain orientation is perpendicular to the substrate, but some domains are mis-oriented by up to 40º. We propose that PMMA domains deform to increase their contact area at the slightly preferential substrate, and this behavior drives the formation of out-of-plane defects such as bent or tilted domains. These outcomes suggest that depth-resolved measurements are needed to fully optimize materials and processes for block copolymer lithography.

Bottom-up alternative lithographic masks from directed self-assembly systems have been extending the limits of critical dimensions in a cost-effective manner although great challenges in controlling defectivity remain open. Particularly, defectivity and dimensional metrology are two main challenges in lithography due to the increasing miniaturisation of circuits. To gain insights about the percentage of alignment, defectivity and order quantification, directed self-assembly block copolymer fingerprints were investigated via an image analysis methodology. Here we present the analysis of hexagonal phase of polystyrene-b-polydimethylsiloxane (PS-b-PDMS) forming linear patterns in topological substrates. From our methodology, we have performed dimensional metrology estimating pitch size and error, and the linewidth of the lines was estimated. In parallel, the methodology allowed us identification and quantification of typical defects observable in self-assembly, such as turning points, disclination or branching points, break or lone points and end points. The methodology presented here yields high volume statistical data useful for advancing dimensional metrology and defect analysis of self- and directed assembly systems.

Directed self-assembly (DSA) of block copolymers (BCP) is a promising candidate for alternative micro lithography due to its cost effectiveness, its ability to reduce critical dimension and to increase pattern density. For contact layer patterning, grapho-epitaxy combined with cylindrical BCP is a good candidate. While contact shrink has already been a well-controlled process, contact multiplication is still undergoing further studies. In this paper we propose to study the impact of 193i scanner variations on BCP overlay for contact doubling.

The nanomechanical properties of solvent cast polymer thin films have been investigated using PeakForce^TM quantitative nanomechanical mapping. The samples consisted in films of polystyrene and poly(methyl methacrylate) obtained after dewetting of toluene solution on a polymeric brush layer. As a second step, we have probed the mechanical properties of Poly(styrenen- methilmethacrylate) (PS-b-PMMA) block co-polymers (BCP) thin films randomly oriented. The measured films has a critical thickness below 50 nm and present features to be resolved of less than 42 nm. Measured surface elastic modulus obtained present a good agreement with previous literature and show how PeakForce technique could be crucial to BCP investigation predicting the mechanical stability of the different phases.

We present a novel approach for the creation of guiding patterns to direct the self-assembly of block copolymers. A neutral layer of a brush polymer is directly exposed by electrons, causing the cross-linking of the brush molecules, and thus changing its local affinity. The advantage relies on the achievable resolution and the reduction of the process steps in comparison with deep UV and conventional electron beam lithography, since it avoids the use of a resist. We envision that this method will be highly valuable for the investigation of novel high-chi DSA materials and complex guiding pattern designs, where pattern placement and resolution is becoming critical.

Directed Self-Assembly (DSA) of block copolymers (BCP) has attracted increasing attention as the potential next generation lithography technology. One of the most promising applications of DSA is the patterning of contact holes in IC circuits using physical guiding templates. In previous studies, researchers have demonstrated that DSA patterns are determined not only by the size and shape of guiding templates, but the template density as well. However, the influence of the pattern density has not been explored systematically, nor is there a fast inspection methodology to visualize and quantify the influence. In this paper, we introduce the concept of DSA Interaction Range (DSAIR). The influence of template density on the DSA patterns is examined using Gaussian convolution of x with y [say what it is a convolution of]. This approach provides us with a fast and quantitative way to model the influence of template density and predict the location of overfilled conditions.

We investigate energy barriers and minimum energy paths (MEPs) for transitions from dislocation-pair defects to perfect lamellae in self-assembly of AB-diblock copolymer plus A- or B-homopolymer blends using self-consistent field theory (SCFT) and the numerical string method. For neutral substrates, all minimum energy paths discovered by the string method show two successive energy barriers. The two-barrier qualitative nature of the MEPs appears not to depend on the presence or absence of small amounts of homopolymer. For the first energy barrier, the barrier height shows pronounced increase with addition of A-homopolymer due to localization of A-homopolymer on the T-junction core of the dislocation. For chemo-epitaxially patterned substrates (stripes of A-attractive substrate alternating with neutral substrate), the presence of A-attractive stripes helps draw the system towards a perfect lamellar configuration, and energy barriers along the MEP are reduced, in some cases disappearing entirely. Our findings provide guidance on how the presence of homopolymer and chemo-epitaxial prepatterns affect the stability of defective morphologies.